Idt Proprietary Port Specific Registers; Figure 15.2 Proprietary Port Specific Register Organization - Renesas IDT 89HPES48H12G2 User Manual

IDT Register Organization
Notes
PES48H12G2 User Manual

IDT Proprietary Port Specific Registers

This section outlines the address range 0x400 through 0xFFF in the PCI-to-PCI bridge address space.
This address range contains IDT proprietary registers that are port specific. Registers in this address range
may be accessed using PCI configuration requests to the corresponding PCI-to-PCI bridge function 0
header, global address space access registers, SMBus, or serial EEPROM. Figure 15.2 shows the organi-
zation of the proprietary port specific registers. Offset addresses for proprietary port specific registers are
listed in Table 15.5. Offset addresses are with respect to the corresponding PCI-to-PCI bridge function 0
base address.
Registers in this address range are referenced as Px_REGNAME where x represents the PES48H12G2
port number and REGNAME represents the register name in Table 15.5. Reading from or writing to an
address not defined in Table 15.5 completes successfully but has an undefined effect.

Figure 15.2 Proprietary Port Specific Register Organization

Port Control and
Status Registers
Internal Error Reporting
Control and Status Registers
Physical Layer Registers
Reserved
Power Management
Registers
Request Metering
Reserved
Global Address Space
Access Registers
15 - 10
0x400
0x480
0x510
0x560
0x700
0x880
0x890
0xFF8
0xFFF
April 5, 2013