Figure 13.4 Configuration Done Sequence Format - Renesas IDT 89HPES48H12G2 User Manual

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IDT SMBus Interfaces
Notes
PES48H12G2 User Manual
The final type of configuration block is the configuration done sequence which is used to signify the end
of a serial EEPROM initialization sequence. If during serial EEPROM initialization, an attempt is made to
initialize a register that is not defined in a configuration space (i.e., not defined in Chapter 15), then the
Unmapped Register Initialization Attempt (URIA) bit is set in the SMBUSSTS register and the write is
ignored.
The configuration done sequence consists of two fields and its format is shown in Figure 13.4. The
TYPE field is always 0x3 for configuration done sequences. The CHECKSUM field contains the checksum
of all of the bytes in all of the fields read from the serial EEPROM from the first configuration block to the
end of this done sequence.

Figure 13.4 Configuration Done Sequence Format

The checksum in the configuration done sequence enables the integrity of the serial EEPROM initializa-
tion to be verified. The checksum is computed in the following manner. An 8-bit counter is initialized to zero
and the 8-bit sum is computed over the configuration bytes stored in the serial EEPROM, including the
entire contents of the configuration done sequence, with the checksum field initialized to zero.
complement of this sum is placed in the checksum field.
The checksum is verified in the following manner. An 8-bit counter is cleared and the 8-bit sum is
computed over the bytes read from the serial EEPROM, including the entire contents of the configuration
2
done sequence.
The correct result should always be 0xFF (i.e., all ones). Checksum checking may be
disabled by setting the Ignore Checksum Errors (ICHECKSUM) bit in the SMBus Control (SMBUSCTL)
register.
If an error is detected during loading of the serial EEPROM, then loading of the serial EEPROM is
aborted and the RSTHALT bit is set in the SWCTL register. This allows debugging of the error condition via
the slave SMBus interface but prevents normal system operation with a potentially incorrectly initialized
device. Error information is recorded in the SMBUSSTS register. Once serial EEPROM initialization
completes, is aborted, or when an error is detected, the EEPROM Done (EEPROMDONE) bit is set in the
SMBus Status (SMBUSSTS) register.
A summary of possible errors during serial EEPROM initialization and specific action taken when
detected is summarized in Table 13.2.
1.
This includes the byte containing the TYPE field.
2.
This includes the checksum byte as well as the byte that contains the type and reserved field.
Bit
Bit
Bit
Bit
Bit
7
6
5
4
3
TYPE
Reserved
Byte 0
0x3
(must be zero)
Byte 1
CHECKSUM[7:0]
13 - 4
Bit
Bit
Bit
2
1
0
April 5, 2013
1
The 1's

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