Figure 13.13 Csr Register Read Using Smbus Read And Write Transactions With Pec Disabled - Renesas IDT 89HPES48H12G2 User Manual

Pci express switch
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IDT SMBus Interfaces
Notes
PES48H12G2 User Manual
PES48H12G2 Slave
S
Wr
A
SMBus Address
PES48H12G2 Slave
S
Wr
A
SMBus Address
PES48H12G2 Slave
A
S
Wr
SMBus Address
PES48H12G2 Slave
S
Wr
A
SMBus Address
PES48H12G2 Slave
S
Rd
A
SMBus Address
PES48H12G2 Slave
S
Wr
A
SMBus Address
PES48H12G2 Slave
S
Rd
A
SMBus Address
PES48H12G2 Slave
S
Wr
A
SMBus Address
PES48H12G2 Slave
S
Rd
A
SMBus Address
PES48H12G2 Slave
S
Wr
A
SMBus Address
PES48H12G2 Slave
S
Rd
A
SMBus Address

Figure 13.13 CSR Register Read Using SMBus Read and Write Transactions with PEC Disabled

13 - 20
CCODE
A
A
CMD=read
START, Word
CCODE
A
A
P
ADDRU
END, Byte
CCODE
(PES48H12G2 not ready with data)
N
P
START,Word
CCODE
A
START,Word
A
N
P
CMD (status)
ADDRL
CCODE
A
Byte
A P
ADDRU
CCODE
A
Word
DATALL
A
DATALM
N
P
CCODE
A
END, Word
A
N
P
DATAUM
DATAUU
A
P
ADDRL
April 5, 2013

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