Table 1.8 System Pins - Renesas IDT 89HPES48H12G2 User Manual

IDT PES48H12G2 Device Overview
Notes
PES48H12G2 User Manual
Signal Type
GPIO[6] I General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
GPIO[7] I/O General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
GPIO[8] I General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: IOEXPINTN
Alternate function pin type: Input
Alternate function: IO expander interrupt.
Table 1.7 General Purpose I/O Pins (Part 2 of 2)
Signal Type
CLKMODE[2:0] Clock Mode. These signals determine the port clocking mode used by
ports of the device.
GCLKFSEL I Global Clock Frequency Select. These signals select the frequency of
the GCLKP and GCLKN signals.
0x0 100 MHz
0x1 125 MHz
P01MERGEN I Port 0 and 1 Merge. P01MERGEN is an active low signal. It is pulled low
internally.
When this pin is low, port 0 is merged with port 1 to form a single x8 port.
The Serdes lanes associated with port 1 become lanes 4 through 7 of port
0. Refer to section Port Merging on page 5-7 for details.
When this pin is high, port 0 and port 1 are not merged, and each operates
as a single x4 port.
P23MERGEN I Port 2 and 3 Merge. P23MERGEN is an active low signal. It is pulled low
internally.
When this pin is low, port 2 is merged with port 3 to form a single x8 port.
The Serdes lanes associated with port 3 become lanes 4 through 7 of port
2. Refer to section Port Merging on page 5-7 for details.
When this pin is high, port 2 and port 3 are not merged, and each operates
as a single x4 port.
P45MERGEN I Port 4 and 5 Merge. P45MERGEN is an active low signal. It is pulled low
internally.
When this pin is low, port 4 is merged with port 5 to form a single x8 port.
The Serdes lanes associated with port 5 become lanes 4 through 7 of port
4. Refer to section Port Merging on page 5-7 for details.
When this pin is high, port 4 and port 5 are not merged, and each operates
as a single x4 port.
P67MERGEN I Port 6 and 7 Merge. P67MERGEN is an active low signal. It is pulled low
internally.
When this pin is low, port 6 is merged with port 7 to form a single x8 port.
The Serdes lanes associated with port 7 become lanes 4 through 7 of port
6. Refer to section Port Merging on page 5-7 for details.
When this pin is high, port 6 and port 7 are not merged, and each operates
as a single x4 port.
Table 1.8 System Pins (Part 1 of 2)
1 - 10
Name/Description
Name/Description
April 5, 2013