Crossbar Interconnect; Datapaths; Table 3.3 Replay Buffer Storage Limit - Renesas IDT 89HPES48H12G2 User Manual

IDT Switch Core
Notes
PES48H12G2 User Manual
Bifurcated

Crossbar Interconnect

The crossbar is a 12x12 matrix of pathways, capable of concurrently transferring data between a
maximum of 12 port pairs. The crossbar interconnects the port ingress buffers to the egress buffers. It
provides two data-interfaces per port, one for the port's ingress buffers and one for the port's egress
buffers.
Note: There is no Ports 10 or 11 in this device.
Figure 3.1 shows the interface between the crossbar and a port's ingress and egress buffers. The
crossbar is able to support 12 simultaneous data transfers. This architecture is well suited for system inter-
connect applications, as it allows simultaneous full-duplex communication between up to 12 peer devices.
Switch Core Switch Core
Port 0 Ingress Buffers Port 0 Ingress Buffers
IFB IFB
PT Queu e PT Queu e
NP Queue NP Queue
CP Queue CP Queue
Port 7 Ingress Buffers Port 7 Ingress Buffers Port 13
IFB IFB
PT Queu e PT Queu e
NP Queue NP Queue
CP Queue CP Queue
Figure 3.1 Crossbar Connection to Port Ingress and Egress Buffers

Datapaths

As mentioned earlier, the Switch Core interfaces with 12 ports. The interface between each port and the
switch core can be logically divided into ingress data interface, egress data interface.
The ingress data interface transfers data received by the port from the PCIe link into the switch-core.
The egress data interface transfers data from the switch-core to the port. All data paths through the ingress
data interface, crossbar interconnect, and egress data interface are 160-bits wide instead of the required
Port Replay Buffer Storage
Mode Limit
x4 32 TLPs
x8 64 TLPs
Merged

Table 3.3 Replay Buffer Storage Limit

O O
r r
d d
e e
r r
i i
n n
g g
12 12
8 x 8 8 x 8
Crossbar Crossbar
O O
r r
d d
e e
r r
i i
n n
g g
3 - 3
Po rt 0 Egress Buffers Po rt 0 Egress Buffers
EFB EFB
O O
PT Queu e PT Queu e
r r
d d
e e
NP Queue NP Queue
r r
i i
n n
CP Queue CP Queue
g g
Port 13
Port 7 Eg ress Buffers Port 7 Eg ress Buffers
EFB EFB
O O
PT Queue PT Queue
r r
d d
e e
NP Queu e NP Queu e
r r
i i
n n
CP Queu e CP Queu e
g g
April 5, 2013