IDT JTAG Boundary Scan
Notes
PES48H12G2 User Manual
Data from Core
Data from Previous Cell
shift_dr
The output enable cells are also output cells. The simplified logic is shown in Figure 18.5.
Output enable from core
Data from previous cell
clock_dr
shift_dr
Data from core
The bidirectional cells are composed of only two boundary scan cells. They contain one output enable
cell and one capture cell, which contains only one register. The input to this single register is selected via a
mux that is selected by the output enable cell when EXTEST is disabled. When the Output Enable Cell is
driving a high out to the pad (which enables the pad for output) and EXTEST is disabled, the Capture Cell
will be configured to capture output data from the core to the pad.
However, in the case where the Output Enable Cell is low (signifying a tri-state condition at the pad) or
EXTEST is enabled, the Capture Cell will capture input data from the pad to the core. The configuration is
shown graphically in Figure 18.5.
EXTEST
D
clock_dr
update_dr
Figure 18.4 Diagram of Output Cell
shift_dr
D
Q
update_dr
D
Q
To next cell
Figure 18.5 Diagram of Bidirectional Cell
18 - 6
To Next Cell
To Output Pad
D
Q
Q
EXTEST
D
Q
OEN to pad
D
Q
EXTEST
April 5, 2013
I/O pin