Port Merging - Renesas IDT 89HPES48H12G2 User Manual

Pci express switch
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IDT Reset and Initialization
Notes
PES48H12G2 User Manual
Single Partition with Port 0 Upstream Port (Port 2 disabled)
In single partition with port 0 upstream port, the initial values outlined in Table 5.3 result in the following
configuration.
– All switch ports, except port 2, are members of partition zero.
– Port 2 is disabled.
– Port zero is configured as the upstream port of partition zero. All other ports associated with parti-
tion zero are configured as downstream ports.
– The initial state of partition zero is active. The initial state of all other partitions is disabled.
In this mode, it is not possible to configure partitions other than partition 0.
Single Partition with Port 2 Upstream Port (Port 0 disabled)
In single partition with port 2 as the upstream port, the initial values outlined in Table 5.3 result in the
following configuration.
– All switch ports, except port 0, are members of partition zero.
– Port 0 is disabled.
– Port two is configured as the upstream port of partition zero. All other ports associated with parti-
tion zero are configured as downstream ports.
– The initial state of partition zero is active. The initial state of all other partitions is disabled.
In this mode, it is not possible to configure partitions other than partition 0.
Multi-Partition Mode
In multi-partition mode, the initial values outlined in Table 5.3 result in the following configuration.
– All switch ports are configured to operate in unattached mode.
– The initial state of all partitions is disabled.
In this mode, switch partitioning is possible.

Port Merging

The switch allows merging of ports to form a single port whose link width is the aggregate sum of the
individual port widths. Port merging is only supported between an even numbered port and its subsequent
odd numbered port. The PxyMERGEN signals, sampled during switch fundamental reset, select which
ports are merged. For example, if the P45MERGEN signal is driven asserted (i.e., low) at switch funda-
mental reset, then ports 4 and 5 are merged. It is not possible to change this port configuration until a
subsequent switch fundamental reset.
When two ports are merged, the even numbered port is active and its odd-numbered pair is de-acti-
vated. For example, when ports 4 and 5 are merged, port 4 remains active and port 5 is de-activated. A de-
activated port has the following behavior:
– All output signals associated with the port are placed in a negated state (e.g., link status and hot-
plug signals).
• The negated value of PxAIN, PxILOCKP, PxPEP, PxPIN, and PxRSTN is determined as shown
in Table 10.2.
• PxACTIVEN and PxLINKUPN are negated.
– All input signals associated with the port are ignored and have no effect on the operation of the
device.
• The state of the following hot-plug input signals is ignored: PxAPN, PxMRLN, PxPDN, PxPFN,
and PxPWRGDN.
– The port is not associated with a PCI Express link. PCI Express configuration requests targeting
the port are not possible and the port is not part of the PCI Express hierarchy.
– The port is not associated with any switch partition. The port is unaffected by the state of any
switch partition, and vice-versa.
– Unused logic is placed in a low power state.
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April 5, 2013

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