Figure 13.9 Serial Eeprom Read Using Smbus Block Write/Read Transactions With Pec; Figure 13.10 Csr Register Write Using Smbus Block Write Transactions With Pec Disabled; Figure 13.11 Serial Eeprom Write Using Smbus Block Write Transactions With Pec Disabled; Figure 13.12 Serial Eeprom Write Using Smbus Block Write Transactions With Pec Enabled - Renesas IDT 89HPES48H12G2 User Manual

IDT SMBus Interfaces
Notes
PES48H12G2 User Manual
PES48H12G2 Slave CCODE
S Wr A
SMBus Address START,END
A P
ADDRU
PES48H12G2 Slave CCODE
S Wr A
SMBus Address START,END
PES48H12G2 Slave CCODE
S Wr A
SMBus Address START,END
ADDRL A ADDRU
Figure 13.9 Serial EEPROM Read Using SMBus Block Write/Read Transactions with PEC Disabled
PES48H12G2 Slave CCODE
S Wr A
SMBus Address START,END
PES48H12G2 Slave CCODE
S Wr A
SMBus Address START,END
PES48H12G2 Slave CCODE
S Wr A
SMBus Address START,END
A
DATALL DATALM

Figure 13.10 CSR Register Write Using SMBus Block Write Transactions with PEC Disabled

PES48H12G2 Slave CCODE
S Wr A
SMBus Address START,END
A
ADDRU DATA

Figure 13.11 Serial EEPROM Write Using SMBus Block Write Transactions with PEC Disabled

PES48H12G2 Slave CCODE
S Wr A
SMBus Address START,END
A
ADDRU DATA

Figure 13.12 Serial EEPROM Write Using SMBus Block Write Transactions with PEC Enabled

13 - 19
A BYTCNT=4 A CMD=read
(PES48H12G2 not ready with data)
N P
PES48H12G2 Slave
A S Rd A
BYTCNT=5
SMBus Address
A DATA N P
(PES48H12G2 busy with previous command, not ready for a new command)
N P
(PES48H12G2 busy with previous command, not ready for a new command)
N P
A A A
BYTCNT=7 CMD=write
A A A
DATAUM DATAUU
A A
BYTCNT=5 CMD=write
A P
A A
BYTCNT=5 CMD=write
A A P
PEC
A EEADDR A ADDRL A
A A
CMD (status) EEADDR
A A
ADDRL ADDRU
P
A A
EEADDR ADDRL
A A
EEADDR ADDRL
April 5, 2013
A
A
A