Smbus Interfaces; Introduction; Master Smbus Interface; Initialization - Renesas IDT 89HPES48H12G2 User Manual

Pci express switch
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Notes
PES48H12G2 User Manual
®

Introduction

PES48H12G2 has two SMBus interfaces. The slave SMBus interface provides full access to all software
visible registers, allowing every register in the device to be read or written by an external SMBus master.
The slave SMBus may also be used to program the serial EEPROM used for initialization. The Master
SMBus interface provides connection for an optional external serial EEPROM used for initialization and
optional external I/O expanders. Six pins make up each of the two SMBus interfaces. These pins consist of
an SMBus clock pin, an SMBus data pin, and 4 SMBus address pins.
As shown in Figure 13.1, the master and slave SMBuses may only be used in a split configuration.

Figure 13.1 Split SMBus Interface Configuration

The switch's SMBus master interface does not support SMBus arbitration. As a result, the switch's
SMBus master must be the only master in the SMBus lines that connect to the serial EEPROM and I/O
expander slaves. In the split configuration, the master and slave SMBuses operate as two independent
buses; thus, multi-master arbitration is not required.

Master SMBus Interface

The master SMBus interface is used during a switch fundamental reset to load configuration values from
an optional serial EEPROM. It is also used to support optional I/O expanders used for hot-plug and link
status signals.

Initialization

Master SMBus initialization occurs during a switch fundamental reset (see section Switch Fundamental
Reset on page 5-3). The Master SMBus Clock Prescalar (MSMBCP) field in the SMBus Control
(SMBUSCTL) register is configured to support 100 KHz SMBus operation.

Serial EEPROM

During a switch fundamental reset, an optional serial EEPROM may be used to initialize any software
visible register in the device. Serial EEPROM loading occurs if the Switch Mode (SWMODE) signal selects
an operating mode that performs serial EEPROM initialization. The address used by the SMBus interface is
set to default 101000b.

SMBus Interfaces

Processor
...
SMBus
Switch
Master
SSMBCLK
SSMBDAT
MSMBCLK
MSMBDAT
Serial
EEPROM
13 - 1
Chapter 13
Other
SMBus
Devices
Hot-Plug
I/O
Expander
April 5, 2013

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