Analog Devices ADuCM355 Hardware Reference Manual page 89

ADuCM355 Hardware Reference Manual
MAIN DAC
MAIN
DAC
6-BIT DAC
STRING
OUTPUT
(6 BITS)
SET BY
LPDACDATx
[17:12]
Low Power DAC Switch Options
There are a number of switch options available that allow the user to configure the low power DACs for various modes of operation.
These switches facilitate a number of different use cases, such as electrochemical impedance spectroscopy. Figure 16 shows the location
of the switches controlled by LPDACSWx, Bits[4:0]. These switches are controlled either automatically via LPDACCONx, Bit 5 or
individually via the LPDACSWx registers.
When LPDACCONx, Bit 5 is cleared, the switches are configured for normal mode. SW2 and SW3 are closed and SW0, SW1, and SW4
are open. When LPDACCONx, Bit 5 is set, the switches are configured for diagnostic mode. SW0 and SW4 are closed and SW1, SW2,
and SW3 are open. This feature is designed for electrochemical use cases in normal mode, where the low power TIAs are used to measure
the sense electrode. In diagnostic mode, the high speed TIA is used to measure the sense electrode. By switching the VZEROx output
from the low power TIA to the high speed TIA, the effective bias on the sensor (V
facilitates high bandwidth measurements such as impedance, pulse, and cyclic voltammetry.
LOW POWER DAC BLOCK DIAGRAM
VREF_2.5V
2.4V
R1
2.36615V
63 × R1
62 × R1
61 × R1
3R1
2R1
1R1
0.2V
Figure 19. Block Diagram of Low Power DACs
TO TOP MUX
TO BOTTOM MUX
TO TOP MUX
TO BOTTOM MUX
TOP
MUX
TO TOP MUX
TO BOTTOM MUX
12-BIT DAC
SELECTS 6 MSBs
VIA VOLTAGE
ACROSS ONE OF
MAIN DAC
RESISTORS
(LPDACDATx[11:0])
TO TOP MUX
TO BOTTOM MUX
TO TOP MUX
TO BOTTOM MUX
BOTTOM
MUX
TO TOP MUX
TO BOTTOM MUX
to V
BIAS
Rev. B | Page 89 of 312
SubDAC
SET BY LPDACDATx[5:0]
63 × R2
62 × R2
2R2
R2
) is unaffected. Using the high speed TIA
ZERO
UG-1262
12-BIT
DAC
OUTPUT
SET BY
LPDACDATx
[11:0]