Low Power Potentiostat Amplifiers And Low Power Tias; Low Power Potentiostat Amplifiers; Low Power Tias - Analog Devices ADuCM355 Hardware Reference Manual

ADuCM355 Hardware Reference Manual

LOW POWER POTENTIOSTAT AMPLIFIERS AND LOW POWER TIAs

The ADuCM355 features two low power TIAs and two low power potentiostat amplifiers. This section details the operation of these
components.

LOW POWER POTENTIOSTAT AMPLIFIERS

The ADuCM355 has two low power potentiostat amplifiers designed to set the bias voltage of an external electrochemical sensor. The
bias voltage is the voltage between the sense electrode and reference electrode. Depending on the electrochemical sensor used, a specific
bias voltage is required. The bias voltage is set by the low powers DACs. See the Low Power DACs section for details.
Figure 15 shows the potentiostat amplifier connected to a 3-lead electrochemical sensor. The potentiostat amplifier (labeled PA in Figure 15) has
the V output of the dual DAC as its noninverting input. The amplifier output is connected to the counter electrode. The reference
BIAS
electrode is connected to the inverting input of the potentiostat. As such, the voltage on the reference electrode is determined by the V
DAC output voltage via the potentiostat amplifier.
CE VCC
RE
SE
C = ~0.1µF
NOTES
1. NOT ALL SWITCHES SHOWN HERE.
Figure 15. Low Power Potentiostat and Low Power TIA and DAC Connected to One Electrochemical Sensor

LOW POWER TIAs

Two low power TIA channels are available on the ADuCM355. The load resistor and gain resistor values are specified in the Lx registers.
Select the TIA gain resistor that maximizes the ADC input voltage range for the selected PGA gain setting. For example, if the PGA gain
setting is 1, select a TIA gain resistor to maximize the ±900 mV range. To calculate the required gain resistor, use the following equation:
I = 0.9/R
MAX TIA
where:
I is the expected full-scale input current.
MAX
R is the TIA gain resistor selected by LPTIACONx, Bits[9:5].
TIA
A number of operation modes are selectable by user code. The different modes are selected by configuring a series of switches. Figure 16
shows the various switches for Channel 0. These switches are controlled within the LPTIASW0 register. The switches in Figure 17 are
controlled by the LPTIASW1 register for Channel 1. Switch 0 (SW0) to Switch 13 (SW13) are the same for both channels. Channel 1
does not have SW15 or SW14. The LPTIASW0 register, Bit 0, controls SW0, and the LPTIASW0 register, Bit 1, controls SW1.
Low Power TIA Protection Diodes
Figure 16 shows back to back protection diodes connected parallel to the R
disconnected by controlling SW0, which in turn is controlled by LPTIASWx, Bit 0. These diodes are intended for use when switching
R gain settings to amplify small currents to prevent saturation of the TIA. These diodes have a leakage current specification that is
TIA
dependent on the voltage across them. The leakage current is large if the differential voltage across the diode is >200 mV. The leakage
current can be >1 nA and several microamperes if >500 mV.
VBIAS0
C = ~0.1µF
CE0
C = ~0.1µF
CAP_POT0
RE0
VZERO0
SE0
DE0
RC0_0
RC0_1
V
BIAS
+
V
BIAS
PA
–
V
ZERO
R = 10kΩ R = 10kΩ
V
ZERO
R
LOAD0
R
TIA0
gain resistor. These diodes can be connected or
TIA0
Rev. B | Page 85 of 312
AIN4/LPF0
VREF_2.5V
REF
BUFFER
DUAL
OUTPUTS
12-BIT
VDAC
LPTIA
TO ADC
UG-1262
BIAS
LOW POWER
BANDGAP
(4)