Source Data End Pointer; Destination Data End Pointer - Analog Devices ADuCM355 Hardware Reference Manual

ADuCM355 Hardware Reference Manual
Table 190. Memory Map of Primary and Alternate DMA Structures
Channel Number Register Description
Channel 23 Reserved, set to 0
Control
Destination end pointer
Source end pointer
... ...
Channel 1 Reserved, set to 0
Control
Destination end pointer
Source end pointer
Channel 0 Reserved, set to 0
Control
Destination end pointer
Source end pointer
1
The row with ellipses (...) indicates all channels between Channel 23 and Channel 1. These channels follow the same register naming contentions and offset address
pattern.
The user must define the DMA structures in their source code, as shown in the Example Code: Define DMA Structures section. After the
structure has been defined, its start address must be assigned to the DMA base address pointer register, PDBPTR. Each register for each
DMA channel is then at the offset address (as specified in Table 190) plus the value in the PDBPTR register.
When the DMA controller receives a request for a channel, it reads the corresponding data structure from the system memory into its
internal cache. Any update to the descriptor in the system memory until the DMA_DONE interrupt is received does not guarantee
expected behavior. It is recommended that the user not update the descriptor before receiving DMA_DONE.
Example Code: Define DMA Structures
To define DMA structures, use the following code:
memset(dmaChanDesc,0x0,sizeof(dmaChanDesc));
uiBasPtr = (unsigned int)&dmaChanDesc;
pADI_DMA->CFG = 1;
pADI_DMA->PDBPTR = uiBasPtr;

SOURCE DATA END POINTER

The SRC_END_PTR memory location stores the address of the last location from which data is read as part of a DMA transfer. This
memory location must be programmed with the end address of the source data before the controller can perform a DMA transfer. The
controller reads this memory location when it starts the first DMA data transfer. The DMA controller does not write to this memory location.
Table 191. Source Data End Pointer
Bits Name
[31:0] SRC_END_PTR

DESTINATION DATA END POINTER

The DST_END_PTR memory location stores the address of the last location to which data is written as part of a DMA transfer. This memory
location must be programmed with the end address of the destination data before the controller can perform a DMA transfer. The controller
reads this memory location when it starts the first DMA data transfer. The DMA controller does not write to this memory location.
Table 192. Destination Data End Pointer
Bits Name
[31:0] DST_END_PTR
1
Primary Structures
Offset Address
0x17C
0x178
0x174
0x170
...
0x01C
0x018
0x014
0x010
0x00C
0x008
0x004
0x000
// Set up the DMA base address pointer register.
// Set up the DMA base pointer.
// Enable DMA controller
Description
The end address of the source data
Description
The end address of the source data
Rev. B | Page 165 of 312
Alternate Structures
Register Description
Reserved, set to 0
Control
Destination end pointer
Source end pointer
...
Reserved, set to 0
Control
Destination end pointer
Source end pointer
Reserved, set to 0
Control
Destination end pointer
Source end pointer
UG-1262
Offset Address
0x1DC
0x1D8
0x1D4
0x1D0
...
0x11C
0x118
0x114
0x110
0x10C
0x108
0x104
0x100