Analog Devices ADuCM355 Hardware Reference Manual page 168

UG-1262
Basic (CHNL_CFG, Bits[2:0] = 001)
In basic mode, the controller can be configured to use either the primary or alternate data structure. The peripheral must present a
request for every data transfer. After the channel is enabled, when the controller receives a request, it performs the following operations:
1. The controller performs a transfer. If the number of transfers remaining is zero, skip to Step 3.
2. The controller arbitrates. If a higher priority channel is requesting service, the controller services that channel. If the peripheral or
software signals a request to the controller, the controller returns to Step 1.
3. At the end of the transfer, the controller generates the corresponding DMA_DONE channel interrupt in the NVIC.
Autorequest (CHNL_CFG, Bits[2:0] = 010)
When the controller operates in autorequest mode, it is only necessary for the controller to receive a single request to enable it to
complete the entire DMA cycle. As such, a large data transfer can occur without significantly increasing the latency for servicing higher
priority requests or requiring multiple requests from the processor or peripheral. Autorequest mode is very useful for a memory to
memory copy application.
In autorequest mode, the controller can be configured to use either the primary or alternate data structure. After the channel is enabled,
when the controller receives a request, it performs the following operations:
1. The controller performs a minimum (2
number of transfers remaining is zero, skip to Step 3.
2. A request for the channel is automatically generated. The controller arbitrates. If the channel has the highest priority, the DMA cycle
returns to Step 1.
3. At the end of the transfer, the controller generates an interrupt for the corresponding DMA channel.
Ping Pong (CHNL_CFG, Bits[2:0] = 011)
In ping pong mode, the controller performs a DMA cycle using one of the data structures and then performs a DMA cycle using the
other data structure. The controller continues to switch between using the primary and alternate data structures until it reads a data
structure that is invalid, or the MCU disables the channel.
Ping pong mode is useful for transferring data using different buffers in memory. In a typical application, the host must configure both
primary and alternate data structures before starting the transfer. As the transfer progresses, the host can subsequently configure primary
or alternate control data structures in the interrupt service routine when the corresponding transfer ends.
The DMA controller interrupts the MCU using the DMA_DONE interrupt after the completion of transfers associated with each control
data structure. The individual transfers using either the primary or alternate control data structure work the same as a basic DMA transfer.
Software Ping Pong DMA Transfer (CHNL_CFG, Bits[2:0] = 011)
In this mode, if the DMA request comes from the software, a request is generated automatically after each arbitration cycle until
completion of primary or alternate descriptor tasks. This final descriptor must use an autorequest transfer type. This mode is shown in
Figure 44.
CHNL_CFG Bits[17:14]
, N) transfers for the channel, where N is the number of transfers. If the
Rev. B | Page 168 of 312
ADuCM355 Hardware Reference Manual