ADuCM355
Hardware Reference Manual
Exception Number
IRQx
32
IRQ16
33
IRQ17
34
IRQ18
35
IRQ19
36
IRQ20
37
IRQ21
38
IRQ22
39
IRQ23
40
IRQ24
41
IRQ25
42
IRQ26
43
IRQ27
44
IRQ28
45
IRQ29
46
IRQ30
47
IRQ31
48
IRQ32
49
IRQ33
50
IRQ34
51
IRQ35
52
IRQ36
53
IRQ37
54
IRQ38
55
IRQ39
56
IRQ40
57
IRQ41
58
IRQ42
59
IRQ43
60
IRQ44
61 to 63
IRQ45
to
IRQ47
64
IRQ48
65 to 67
IRQ49
to
IRQ51
68
IRQ52
69
IRQ53
70
IRQ54
71
IRQ55
72
IRQ56
73
IRQ57
74
IRQ58
75
IRQ59
76
IRQ60
77
IRQ61
78
IRQ62
79
IRQ63
1
The corresponding PCLK is required to generate the interrupt.
Vector
SPI1
2
I
C slave
2
I
C master
DMA Error
DMA Channel 0 done
DMA Channel 1 done
DMA Channel 2 done
DMA Channel 3 done
DMA Channel 4 done
DMA Channel 5 done
DMA Channel 6 done
DMA Channel 7 done
DMA Channel 8 done
DMA Channel 9 done
DMA Channel 10 done
DMA Channel 11 done
DMA Channel 12 done
DMA Channel 13 done
DMA Channel 14 done
DMA Channel 15 done
Reserved
Reserved
Reserved
Reserved
Digital Die General-Purpose Timer 2
Digital die crystal oscillator
Reserved
Reserved
Reserved
Reserved
Analog die ADC
Reserved
Analog die watchdog timer
Reserved
Analog Die General-Purpose Timer 0
Analog Die General-Purpose Timer 1
Reserved
DMA analog die data FIFO (DMA Channel 17)
DMA Channel 18 done
DMA Channel 19 done
DMA Channel 20 done
DMA Channel 21 done
DMA Channel 22 done
DMA Channel 23 done
Rev. B | Page 43 of 312
UG-1262
Wake Up From
Flexi
Hibernate
1
Yes
No
1
Yes
No
1
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Not applicable
Not applicable
Not applicable
Not applicable
Yes
No
Not applicable
Not applicable
Yes
No
Yes
No
Not applicable
Not applicable
Not applicable
Not applicable
Yes
No
Not applicable
Not applicable
Yes
No
Not applicable
Not applicable
Yes
No
Not applicable
Not applicable
Yes
No
Yes
No
Not applicable
Not applicable
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
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