ADuCM355
Hardware Reference Manual
Bits
Bit Name
Settings
1
PAPDEN
0
TIAPDEN
LOW POWER TIA SWITCH CONFIGURATION FOR CHANNEL 1 REGISTER
Address: 0x400C20E0, Reset: 0x00000000, Name: LPTIASW1
See Figure 17 for details on the switches mentioned in this register.
Table 112. Bit Descriptions for LPTIASW1
Bits
Bit Name
Settings
[31:14]
Reserved
13
TIABIASSEL
12
PABIASSEL
11
SW11
10
SW10
9
SW9
8
SW8
7
SW7
6
SW6
5
SW5
4
SW4
3
SW3
Description
Potentiostat Amplifier Power-Down. Low power Potentiostat Amplifier 1 power-down
control bit.
0
Power-up.
1
Power-down.
TIA Power-Down. Low power TIA1 power-down control bit.
0
Power up.
1
Power down.
Description
Reserved.
TIA SW13 Control Active High.
0
Disconnect TIA bias voltage from the VZERO0 pin.
1
Connect TIA bias voltage to the VZERO0 pin.
TIA SW12 Control Active High.
0
Disconnect potentiostat amplifier bias voltage from the VBIAS1 pin.
1
Connect potentiostat amplifier bias voltage to the VBIAS1 pin.
SW11 Switch Control Active High.
0
Open switch.
1
Close switch.
SW10 Switch Control Active High.
0
Open switch.
1
Close switch.
SW9 Switch Control Active High.
0
Open switch.
1
Close switch.
SW8 Switch Control Active High.
0
Open switch.
1
Close switch.
SW7 Switch Control Active High.
0
Open switch.
1
Close switch.
SW6 Switch Control Active High.
0
Open switch.
1
Close switch.
SW5 Switch Control Active High. Close to connect external capacitor or R
between the RC1_0 and RC1_1 pins.
0
Open switch.
1
Close switch.
SW4 Switch Control Active High.
0
Open switch.
1
Close switch.
SW3 Switch Control Active High.
0
Open switch.
1
Close switch.
Rev. B | Page 97 of 312
UG-1262
Reset
Access
0x1
R/W
0x1
R/W
Reset
Access
0x0
R
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
resistor
0x0
R/W
TIA
0x0
R/W
0x0
R/W
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