Cyclic Voltammetry - Analog Devices ADuCM355 Hardware Reference Manual

UG-1262
pADI_AFE->TSWFULLCON = 0x110;
pADI_AFE->SWCON |=
BITM_AFE_SWCON_SWSOURCESEL;
AfeHSTIACon(AMPPOWER_NORM,
HSTIABIAS_VZERO0); // Set common-mode source as Vzero0 if HSTIA
AfeHSTIASeCfg(HSTIA_RTIA_80K,
BITM_HSTIA_CTIA_1PF,
0);
If the high speed TIA is selected as the ADC input channel,
AfeAdcChan(MUXSELP_HSTIA_P,
MUXSELN_HSTIA_N);
If the sensor output pin is connected to the diagnostic electrodes (DE0 or DE1), the user can reduce the R
To generate sharp voltage transients on the sensor bias voltage, open SW12 and SW13 (as shown in Figure 16) to disconnect the low
power DAC outputs, V , and V
BIAS
LPDACCON0, Bit 5 = 1, and LPDACSW0 = 0x32.
To configure the switches in the potentiostat for the pulse test, set LPTIASWx, Bits[11:0] = 0x094 to use the high speed TIA. See the Exiting
Cyclic Voltammetry Mode section for recommendations to decrease the settling time of the sensor when exiting pulse testing.

CYCLIC VOLTAMMETRY

Cyclic voltammetry is similar to the pulse test, except that both the V
sensor bias voltage and the common-mode voltage of the sensor to different levels. Use the high speed TIA for the current output
measurement from the sensor, rather than the low power TIA.
To generate sharp voltage transients on the sensor bias voltage, open SW12 and SW13 (as shown in Figure 16) to disconnect the low
power DAC outputs and V
BIAS
LPDACCON0, Bit 5 = 1, and LPDACSW0 = 0x32 to open SW12 and SW13.
To configure the switches in the potentiostat loop for the ramp test with the high speed TIA, set LPTIASWx, Bits[11:0] = 0x094. See
Figure 39 for switch setup as a result of this configuration.
To capture the full current transient of each step in the voltammetry cycle, it may be necessary to optimize the ADC filter settings for
speed rather than noise performance.
// Step 2: Close T9 & T5. Leave T10, T11 open
// Step 3: to write to T-Switch control register
// RTIA setting
// internal load of 1pF
// protection diodes disconnected
// Select HSTIA output as ADC input versus HSTIA_N to the ADC
from the external 100 nF filter capacitors. Configure LPTIASWx, Bits [13:12] = 00,
ZERO
and V from the external 100 nF filter capacitors. Configure LPTIASWx, Bits[13:12] = 00,
ZERO
ADuCM355
and V outputs of the low power DAC can change to set the
BIAS ZERO
Rev. B | Page 154 of 312
Hardware Reference Manual
with Chan0 required
value to <100 Ω.
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