Register Summary: I C - Analog Devices ADuCM355 Hardware Reference Manual

ADuCM355 Hardware Reference Manual
REGISTER SUMMARY: I
2
Table 282. I C Register Summary
Address Name
0x40003000 MCTL
0x40003004 MSTAT
0x40003008 MRX
0x4000300C MTX
0x40003010 MRXCNT
0x40003014 MCRXCNT
0x40003018 ADR1
0x4000301C ADR2
0x40003024 DIV
0x40003028 SCTL
0x4000302C SSTAT
0x40003030 SRX
0x40003034 STX
0x40003038 ALT
0x4000303C ID0
0x40003040 ID1
0x40003044 ID2
0x40003048 ID3
0x4000304C FSTAT
0x40003050 SHCTL
0x40003058 ASTRETCH_SCL
2
C
Description
Master control
Master status
Master receive data
Master transmit data
Master receive data count
Master current receive data count
First master address byte
Second master address byte
Serial clock period divisor
Slave control
2
Slave I C status, error, and IRQ
Slave receive
Slave transmit
Hardware general call ID
First slave address device ID
Second slave address device ID
Third slave address device ID
Fourth slave address device ID
Master and slave FIFO status
Master and slave shared control
Automatic stretch control for master and slave mode
Rev. B | Page 231 of 312
UG-1262
Reset Access
0x0000 R/W
0x6000 R
0x0000 R
0x0000 R/W
0x0000 R/W
0x0000 R
0x0000 R/W
0x0000 R/W
0x1F1F R/W
0x0000 R/W
0x0001 R
0x0000 R
0x0000 R/W
0x0000 R/W
0x0000 R/W
0x0000 R/W
0x0000 R/W
0x0000 R/W
0x0000 R/W
0x0000 W
0x0000 R/W