Analog Capture Interrupt Register - Analog Devices ADuCM355 Hardware Reference Manual

ADuCM355 Hardware Reference Manual
Bits Bit Name
2 SINC2RDYIEN
1 DFTRDYIEN
0 ADCRDYIEN

ANALOG CAPTURE INTERRUPT REGISTER

Address: 0x400C2098, Reset: 0x00000000, Name: ADCINTSTA
The bits in this register are sticky when set. Each bit is cleared by writing a 1 to its location. Writing a 0 has no effect. If simultaneously
the interrupt source is asserted and the core is attempting to clear a bit, the interrupt remains set. A read of 1 means the interrupt source
has been asserted since the last time the bit was cleared. A read of 0 means the interrupt source has not been asserted since the last time
the bit was cleared.
Table 71. Bit Descriptions for ADCINTSTA
Bits Bit Name
[31:8] Reserved
7 MEANRDY
6 ADCDIFFERR
5 ADCMAXERR
4 ADCMINERR
3 TEMPRDY
Settings Description
Low-Pass Filter Result Interrupt. Supply rejection filter result ready for
interrupt enable. The SINC2DAT register is ready for reading.
0 Interrupt disabled.
1 Interrupt enabled.
DFT Result Ready Interrupt. The DFTREAL and DFTIMAG registers are ready for
reading.
0 Interrupt disabled.
1 Interrupt enabled.
ADC Result Ready Interrupt Enable. The ADCDAT register is ready for reading.
0 Interrupt disabled.
1 Interrupt enabled.
Settings Description
Reserved.
Mean Result Ready. If STATSCON, Bit 0 is set to 1, this bit indicates the status
of the STATSMEAN register. The user must write 1 to this bit to clear it.
Writing 0 has no effect.
0 Interrupt not asserted.
Interrupt asserted. The STATSMEAN register is ready for reading. This bit
1
generates an interrupt if ADCINTIEN, Bit 7 = 1.
ADC Delta Ready. ADC delta value check fail. User must write 1 to this bit to
clear it. Writing 0 has no effect.
0 Interrupt not asserted.
1 Interrupt asserted. When set, this bit indicates that the difference between
two consecutive ADCDAT results was greater than the value specified by the
ADCDELTA register. This bit generates an interrupt if ADCINTIEN, Bit 6 = 1.
ADC Maximum Value Check Fail. User must write 1 to this bit to clear it.
Writing 0 has no effect.
0 Interrupt not asserted.
1 Interrupt asserted. When set, indicates that ADCDAT result was greater than
the value specified by the ADCMAX register. This bit generates an interrupt if
ADCINTIEN, Bit 5 = 1. User must write 1 to this bit to clear it. Writing 0 has no
effect.
ADC Minimum Value Check Fail. Writing 0 has no effect.
0 Interrupt not asserted.
1 Interrupt asserted. When set, indicates ADCDAT result was less than the value
specified by ADCMIN. This bit generates an interrupt if ADCINTIEN, Bit 4 = 1.
Temperature Sensor Result Ready Interrupt. User must write 1 to this bit to
clear it. Writing 0 has no effect.
0 Interrupt not asserted.
1 Interrupt asserted. When set, indicates TEMPSENSDAT0 result is ready for
reading. This bit generates an interrupt if ADCINTIEN, Bit 3 = 1.
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UG-1262
Reset Access
0x0 R/W
0x0 R/W
0x0 R/W
Reset Access
0x0 R
0x0 R/W1C
0x0 R/W1C
0x0 R/W1C
0x0 R/W1C
0x0 R/W1C