UG-1262
ANALOG DEVICES FLASH SECURITY REGISTER
Address: 0x40018050, Reset: 0x00000000, Name: ADI_POR_SEC
This register resets only after a POR or an external reset.
Table 241. Bit Descriptions for ADI_POR_SEC
Bits
Bit Name
Settings
[31:1]
Reserved
0
SECURE
Description
Reserved.
Prevents Read or Write to User Space. Set this bit to prevent a read or write access to
user space. This bit is sticky when set and requires a user key. When set, this bit
cannot be cleared without resetting the device using a POR or external reset. This bit
plays a direct role in user space security enforcement. When set, this bit prevents
access to user space. DCode reads return bus faults with the data bus = 0. ICode
reads return bus faults with the data bus = 0. APB writes are denied, and the flash
content is unchanged. When set, the user can still perform mass erase and page erase
operations. However, the WRPROT register still applies and only unprotected pages
can be erased. Mass erase is not allowed if any pages are protected. See the Security
Features section for more information.
Rev. B | Page 204 of 312
ADuCM355
Hardware Reference Manual
Reset
Access
0x0
R
0x0
R/W1S
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