Sleep And Wake-Up Timer; Sleep And Wake-Up Timer Features; Sleep And Wake-Up Timer Overview; Configuring A Defined Sequence Order - Analog Devices ADuCM355 Hardware Reference Manual

ADuCM355 Hardware Reference Manual

SLEEP AND WAKE-UP TIMER

SLEEP AND WAKE-UP TIMER FEATURES

The ADuCM355 integrates a 20-bit sleep and wake-up timer. The sleep and wake-up timer provides automated control of the sequencer
and can run up to eight sequences sequentially in any order from SEQ0 to SEQ3. Each sequence has a defined sleep period
(SEQxSLEEPx) and a defined active period (SEQxWUPx). The timer is clocked from the internal 32 kHz oscillator clock source.

SLEEP AND WAKE-UP TIMER OVERVIEW

The sleep and wake-up timer block consists of a 20-bit timer that counts down. The source clock is the 32 kHz, internal, low frequency oscillator.
When the timer elapses, the device wakes up and runs a sequence automatically. Up to eight sequences can run sequentially.
When the timer elapses, the device returns to sleep. If the timer elapses before the sequence completes execution, the remaining
commands in the sequence are ignored. Therefore, the user code must ensure that the values in the SEQxSLEEPx registers are large
enough to allow sequences to execute all commands.
It is recommended to use the wake-up timer to disable the timer sleep function (AFE PWRMOD, Bit 2 = 0) and use the sequencer to enter
hibernate mode. Set the AFE PWRMOD register, Bit 3 = 1 to enable the sequencer to put the device in hibernate mode.

CONFIGURING A DEFINED SEQUENCE ORDER

The sleep and wake-up timer provides a feature that allows a specific order of sequences to execute periodically. The order in which the
sequences are executed is defined in the SEQORDER register. There are eight available slots in this register (A to H). Each slot can be
configured with any one of the four sequences. Figure 36 shows an example diagram of this feature. There are four defined sequences
executed, SEQ0, SEQ1, SEQ2, and SEQ3, as shown in Figure 36.
To configure the ADuCM355 to implement this sequence order, implement the following register settings:
1. SEQORDER, Bits[1:0] = 00
2. SEQORDER, Bits[3:0] = 01
3. SEQORDER, Bits[5:4] = 10
4. SEQORDER, Bits[7:6] = 11
5. CON, Bits[3:1] = 011
SEQ0SLEEPx
SEQ2SLEEPx
20-BIT DOWN
INTERNAL
32kHz OSCILLATOR COUNTER
SEQ0WUPx
HIBERNATE
SEQ2WUPx
Figure 34. Sleep and Wake-Up Timer Block Diagram
SEQUENCE EXECUTION
HIBERNATE
ACTIVE MODE
MODE
SEQxWUPx
TIME ELAPSES
PWRMOD REGISTER, BIT 3
SEQSLPEN = 1. AUTOMATIC SLEEP
BY SEQUENCER COMMAND
Figure 35. Sleep and Wake-Up Timing Diagram
ORDER OF SEQUENCES
SEQ0 SEQ1 SEQ2 SEQ3
A B C D
Figure 36. Sequence Order Diagram
Rev. B | Page 145 of 312
SEQ1SLEEPx
SEQ3SLEEPx
DEVICE WAKE-UP
SEQ1WUPx
SEQ3WUPx
HIBERNATE
MODE
SEQxSLEEPx
TIME ELAPSES
REPEAT
SEQ0 SEQ1 SEQ2
A B C
UG-1262