Analog Devices ADuCM355 Hardware Reference Manual page 87

ADuCM355 Hardware Reference Manual
RE1
CE1
SW3
CAP_POT1
10kΩ
RE1
SW11
SE1
SW1
RC1_0
RC1_1
SE0
SE1
0Ω
10Ω
VBIAS1
LPDACSW1[3]
SW12
SW15
+
PA
SW2
–
SW8
SW10
10kΩ
SW4
R
LOAD
LPTIACON1
[12:10]
R
LPTIACON1
[9:5]
TSWFULLCON[4]
T5 HSTIA
TSWFULLCON[6]
T7
Figure 17. Low Power TIA, Low Power Potentiostat, and Low Power DAC Switches for Channel 1
10Ω 30Ω 50Ω 100Ω
20Ω 20Ω 50Ω 110Ω
(POT) 110Ω
Figure 18. Low Power TIA R
VZERO1
LPDACSW1[1]
SW13
OPEN: LPDACCON1[5] = 1
LPDACCON1[3]
AND LPDACSW1[4] = 0
VZERO1
LPDACCON1[4]
SW6
+
LPTIA
–
SW7
TIA
FORCE/SENSE
SW0
LPDACSW1[0]
ADCVBIAS_CAP (1.11V)
LPDACSW0[0]
1.6kΩ 3.1kΩ
890Ω 500Ω 500Ω 1kΩ
1kΩ 2kΩ 3kΩ
and R Configuration
LOAD GAIN
Rev. B | Page 87 of 312
VREF_2.5V
LPBUF
12-BIT
LPDAC1
6-BIT LPREF
SW5 SW9
R
LPF
LPTIACON1
[15:13]
VZERO1
VZERO0
3.6kΩ
500Ω 500Ω 2kΩ
4kΩ 6kΩ
UG-1262
AIN7_LPF1
ADC
MUX