De0 High Speed Tia Resistor Configuration Register; High Speed Tia Amplifier Configuration Register - Analog Devices ADuCM355 Hardware Reference Manual

ADuCM355 Hardware Reference Manual

DE0 HIGH SPEED TIA RESISTOR CONFIGURATION REGISTER

Address: 0x400C20F8, Reset: 0x000000FF, Name: DE0RESCON
Table 124. Bit Descriptions for DE0RESCON
Bits Bit Name
[31:8] Reserved
[7:0] DE0RCON

HIGH SPEED TIA AMPLIFIER CONFIGURATION REGISTER

Address: 0x400C20FC, Reset: 0x00000000, Name: HSTIACON
Table 125. Bit Descriptions for HSTIACON
Bits Bit Name Settings
[31:2] Reserved
[1:0] VBIASSEL
Settings Description
Reserved.
DE0 R and R
LOAD03
R , open the switches T9 and T11, but close T10 by setting TSWFULLCON,
LOAD
Bits[10:8] = 0b010. To set the R
Description
Reserved.
Select High Speed TIA Positive Input.
00 ADCVBIAS_CAP. 1.1 V voltage source.
01 V output from low power DAC0.
ZERO
10 V output from low power DAC1.
ZERO
11 Reserved.
Setting. DE0 high speed TIA resistor settings. To use this
TIA2_03
and R
LOAD03 TIA2_03
Rev. B | Page 107 of 312
resistor values, see Table 120.
UG-1262
Reset Access
0x0 R
0xFF R/W
Reset Access
0x0 R
0x0 R/W