UG-1262
Bits
Bit Name
7
N8STA
6
N7STA
5
N6STA
4
N5STA
3
N4STA
2
N3STA
1
N2STA
0
N1STA
Tx SWITCH MATRIX STATUS REGISTER
Address: 0x400C21BC, Reset: 0x00000000, Name: TSWSTA
This register gives the status of the Tx switches shown in Figure 27.
Table 152. Bit Descriptions for TSWSTA
Bits
Bit Name
[31:12]
Reserved
11
TR1STA
10
T11STA
9
T10STA
8
T9STA
7
T8STA
6
T7STA
5
T6STA
Settings
Description
Status of N8 Switch.
0
Switch open.
1
Switch closed.
Status of N7 Switch.
0
Switch open.
1
Switch closed.
Status of N6 Switch.
0
Switch open.
1
Switch closed.
Status of N5 Switch.
0
Switch open.
1
Switch closed.
Status of N4 Switch.
0
Switch open.
1
Switch closed.
Status of N3 Switch.
0
Switch open.
1
Switch closed.
Status of N2 Switch.
0
Switch open.
1
Switch closed.
Status of N1 Switch.
0
Switch open.
1
Switch closed.
Settings
Description
Reserved.
Status of TR1 Switch.
0
Switch open.
1
Switch closed.
Status of T11 Switch.
0
Switch open.
1
Switch closed.
Status of T10 Switch.
0
Switch open.
1
Switch closed.
Status of T9 Switch.
0
Switch open.
1
Switch closed.
Status of T8 Switch.
0
Switch open.
1
Switch closed.
Status of T7 Switch.
0
Switch open.
1
Switch closed.
Status of T6 Switch.
0
Switch open.
1
Switch closed.
Rev. B | Page 128 of 312
ADuCM355
Hardware Reference Manual
Reset
Access
0x0
R
0x0
R
0x0
R
0x0
R
0x0
R
0x0
R
0x0
R
0x0
R
Reset
Access
0x0
R
0x0
R
0x0
R
0x0
R
0x0
R
0x0
R
0x0
R
0x0
R
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