Chapter 13 Dma Functions (Dma Controller); Features - NEC V850ES/SA2 UPD703201 Manual

The V850ES/SA2 and V850ES/SA3 include a direct memory access (DMA) controller (DMAC) that executes and
controls DMA transfer.
The DMAC controls data transfer between memory and I/O, between memories, or between I/Os based on DMA
requests issued by the on-chip peripheral I/O (serial interface, real-time pulse unit, and A/D converter), interrupts from
external input pins, or software triggers (memory refers to internal RAM or external memory).

13.1 Features

• 4 independent DMA channels
• Transfer unit: 8/16 bits
• Maximum transfer count: 65,536 (2
• Transfer type: Two-cycle transfer
• Transfer mode: Single transfer mode
• Transfer requests
• Request by interrupts from on-chip peripheral I/O (serial interface, timer/counter, A/D converter) or interrupts
from external input pin
• Requests by software trigger
• Transfer objects
• Internal RAM ↔ peripheral I/O
• Peripheral I/O ↔ peripheral I/O
• Internal RAM ↔ external memory
• External memory ↔ peripheral I/O
• External memory ↔ external memory

CHAPTER 13 DMA FUNCTIONS (DMA CONTROLLER)

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