Advanced control timer (TIM1)
compare value in TIM1_CCRx is greater than the auto-reload value (in TIM1_ARR)
then OCxREF is held at '1'. If the compare value is 0 then OCxRef is held at '0'.
Figure 57
TIM1_ARR=8.
Figure 57. Edge-aligned PWM waveforms (ARR=8)
Downcounting configuration
Downcounting is active when DIR bit in TIM1_CR1 register is high. Refer to the
Downcounting mode on page 154
In PWM mode 1, the reference signal OCxRef is low as long as
TIM1_CNT > TIM1_CCRx else it becomes high. If the compare value in TIM1_CCRx is
greater than the auto-reload value in TIM1_ARR, then OCxREF is held at '1'. 0% PWM
is not possible in this mode.
PWM center-aligned mode
Center-aligned mode is active when the CMS bits in TIM1_CR1 register are different from
'00' (all the remaining configurations having the same effect on the OCxRef/OCx signals).
The compare flag is set when the counter counts up, when it counts down or both when it
counts up and down depending on the CMS bits configuration. The direction bit (DIR) in the
TIM1_CR1 register is updated by hardware and must not be changed by software. Refer to
the
Center-aligned mode (up/down counting) on page
Figure 58
TIM1_ARR=8,
PWM mode is the PWM mode 1,
The flag is set when the counter counts down corresponding to the center-aligned
mode 1 selected for CMS=01 in TIM1_CR1 register.
170/501
shows some edge-aligned PWM waveforms in an example where
Counter register
OCXREF
CCRx=4
OCXREF
CCRx=8
OCXREF
CCRx>8
OCXREF
CCRx=0
shows some center-aligned PWM waveforms in an example where:
0
1
2
3
CCxIF
CCxIF
'1'
CCxIF
'0'
CCxIF
156.
4
5
6
7
8
0
RM0008
1
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