Figure 45. Update Rate Examples Depending On Mode And Tim1_Rcr Register Settings - ST STM32F101 Series Reference Manual

Advanced arm-based 32-bit mcus
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Advanced control timer (TIM1)
Figure 45. Update rate examples depending on mode and TIM1_RCR register
Counter
TIM1_CNT
TIM1_RCR = 0
TIM1_RCR = 1
TIM1_RCR = 2
TIM1_RCR = 3
TIM1_RCR
and
re-synchronization
160/501
settings
Center-aligned mode
UEV
UEV
UEV
UEV
= 3
UEV
(by SW)
UEV Update Event: Preload registers transferred to active registers and update interrupt generated
Update Event if the repetition downcounter underflow occurs when the counter is equal to
to the auto-reload value.
Edge-aligned mode
Upcounting
(by SW)
RM0008
Downcounting
(by SW)

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