Bkp Register Map; Table 32. Bkp - Register Map And Reset Values - ST STM32F101 Series Reference Manual

Advanced arm-based 32-bit mcus
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Backup registers (BKP)
9.6

BKP register map

BKP registers are mapped as 16-bit addressable registers as described in the table below:
Table 32.
BKP - register map and reset values
Offset
Register
00h
BKP_DR1
04h
Reset value
BKP_DR2
08h
Reset value
BKP_DR3
0Ch
Reset value
BKP_DR4
10h
Reset value
BKP_DR5
14h
Reset value
BKP_DR6
18h
Reset value
BKP_DR7
1Ch
Reset value
BKP_DR8
20h
Reset value
BKP_DR9
24h
Reset value
BKP_DR10
28h
Reset value
BKP_RTCCR
2C
Reset value
BKP_CR
30h
Reset value
BKP_CSR
34h
Reset value
Refer to
136/501
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Table 1 on page 27
for the register boundary addresses.
Reserved
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reserved
Reserved
Reserved
D[15:0]
0
0
0
0
0
0
0
0
0
D[15:0]
0
0
0
0
0
0
0
0
0
D[15:0]
0
0
0
0
0
0
0
0
0
D[15:0]
0
0
0
0
0
0
0
0
0
D[15:0]
0
0
0
0
0
0
0
0
0
D[15:0]
0
0
0
0
0
0
0
0
0
D[15:0]
0
0
0
0
0
0
0
0
0
D[15:0]
0
0
0
0
0
0
0
0
0
D[15:0]
0
0
0
0
0
0
0
0
0
D[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reserved
0
0
RM0008
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAL[6:0]
0
0
0
0
0
0
0
0
0
0

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