RM0008
If you configure a port bit as Alternate Function Output, this disconnects the output register
and connects the pin to the output signal of an on-chip peripheral.
If software configures a GPIO pin as Alternate Function Output, but peripheral is not
activated, its output is not specified.
5.1.5
Software remapping of I/O alternate functions
To optimize the number of peripheral I/O functions for different device packages, it is
possible to remap some alternate functions to some other pins. This is achieved by
software, by programming the corresponding registers (refer to
page
92. In that case, the alternate functions are no longer mapped to their original
assignations.
5.1.6
GPIO locking mechanism
The locking mechanism allows the IO configuration to be frozen. When the LOCK sequence
has been applied on a port bit, it is no longer possible to modify the value of the port bit until
the next reset.
5.1.7
Input configuration
When the I/O Port is programmed as Input:
The Output Buffer is disabled
The Schmitt Trigger Input is activated
The weak pull-up and pull-down resistors are activated or not depending on input
configuration (pull-up, pull-down or floating):
The data present on the I/O pin is sampled into the Input Data Register every APB2
clock cycle
A read access to the Input Data Register obtains the I/O State.
The
Figure 11 on page 79
Figure 11. Input floating/pull up/pull down configurations
Read
Write
Read/write
1. V
DD_FT
General-purpose and alternate-function I/Os (GPIOs and AFIOs)
shows the Input Configuration of the I/O Port bit.
input driver
output driver
is a potential specific to five-volt tolerant I/Os and different from V
V
DD
on/off
on
TTL Schmitt
trigger
on/off
V
SS
AFIO register description on
or V
V
DD
DD_FT
protection
diode
I/O pin
protection
diode
V
SS
.
DD
(1)
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