Power control (PWR)
To further reduce power consumption in Sleep mode the peripheral clocks can be disabled
prior to executing the WFI or WFE instructions.
Peripheral clock gating is controlled by the
(RCC_AHBENR),
Peripheral Clock enable register
3.3.3
Sleep mode
Entering Sleep mode
The Sleep mode is entered by executing the WFI (Wait For Interrupt) or WFE (Wait for
Event) instructions. Two options are available to select the Sleep mode entry mechanism,
depending on the SLEEPONEXIT bit in the Cortex-M3 System Control register:
Sleep-now: if the SLEEPONEXIT bit is cleared, the MCU enters Sleep mode as soon
as WFI or WFE instruction is executed.
Sleep-on-exit: if the SLEEPONEXIT bit is set when the WFI instruction is executed, the
MCU enters Sleep mode as soon as it exits the lowest priority ISR.
Refer to
Exiting Sleep mode
If the WFI instruction is used to enter Sleep mode, any peripheral interrupt acknowledged by
the nested vectored interrupt controller (NVIC) can wake up the device from Sleep mode.
If the WFE instruction is used to enter Sleep mode, the MCU exits Sleep mode as soon as
an event occurs. This event can be either an interrupt enabled in the peripheral control
register but not in the NVIC, or an EXTI line configured in event mode.
This mode offers the lowest wakeup time as no time is wasted in interrupt entry/exit.
Refer to
Table 5.
Sleep-now mode
Mode entry
Mode exit
Wakeup latency
38/501
APB1 Peripheral Clock enable register (RCC_APB1ENR)
Table 5
and
Table 6
for details on how to enter Sleep mode.
Table 5
and
Table 6
for more details on how to exit Sleep mode.
Sleep-now
WFI (Wait for Interrupt) or WFE (Wait for Event) while:
– SLEEPDEEP = 0 and
– SLEEPONEXIT = 0
Refer to the Cortex™-M3 System Control register.
If WFI was used for entry:
Interrupt: Refer to
If WFE was used for entry
Wakeup event: Refer to
None
AHB Peripheral Clock enable register
(RCC_APB2ENR).
Description
Table 27: Vector table
Section 6.2.3: Wakeup event management
RM0008
and
APB2
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