ST STM32F101 Series Reference Manual page 119
Advanced arm-based 32-bit mcus
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RM0008
Table 30.
DMA - register map and reset values (continued)
Offset
Register
DMA_CNDTR6
070h
Reset value
DMA_CPAR6
074h
Reset value
0
DMA_CMAR6
078h
Reset value
0
07Ch
DMA_CCR7
080h
Reset value
DMA_CNDTR7
084h
Reset value
DMA_CPAR7
088h
Reset value
0
DMA_CMAR7
08Ch
Reset value
0
090h
Refer to
Reserved
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reserved
Reserved
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 1 on page 27
for the register boundary addresses.
0
0
PA[31:0]
0
0
0
0
0
0
0
0
0
MA[31:0]
0
0
0
0
0
0
0
0
0
Reserved
0
0
0
PA[31:0]
0
0
0
0
0
0
0
0
0
MA[31:0]
0
0
0
0
0
0
0
0
0
Reserved
DMA controller (DMA)
NDT[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
M
PL
PSIZE
SIZE
[1:0]
[1:0]
[1:0]
0
0
0
0
0
0
0
0
0
NDT[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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