Rcc Register Map; Table 10. Rcc - Register Map And Reset Values - ST STM32F101 Series Reference Manual

Reset and clock control (RCC)
4.4

RCC register map

Table 10. RCC - register map and reset values
Offset Register
RCC_CR
000h
Reset value
RCC_CFGR
004h
Reset value
RCC_CIR
008h
Reset value
RCC_APB2RSTR
00Ch
Reset value
RCC_APB1RSTR
010h Reserved
Reset value
RCC_AHBENR
014h
Reset value
RCC_APB2ENR
018h
Reset value
RCC_APB1ENR
01Ch Reserved
Reset value
RCC_BDCR
020h
Reset value
RCC_CSR
024h
Reset value 0
Refer to
74/501
Reserved
0 0
MCO [2:0]
Reserved
0 0 0
Reserved
0
Reserved
0 0 0 0
Reserved
0 0 0 0
Reserved
0 0 0 1 1 0
Table 1 on page 27 for the register boundary addresses.
Reserved
0 0 0 0 0
ADC
PLLMUL[3:0] PRE
[1:0]
0 0 0 0 0 0 0 0
0 0 0 0 0
0 0 0 0
Reserved
0 0 0 0
0 0
HSICAL[7:0] HSITRIM[4:0]
0 0 0 0 0 0 0 1 0
PPRE2 PPRE1
HPRE[3:0]
[2:0] [2:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
Reserved
0 0
0 0 0 0 0 0
Reserved
0 0
RTC
SEL
Reserved Reserved
[1:0]
0 0
Reserved
RM0008
0 0 0 1 1
SWS SW
[1:0] [1:0]
0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0
1 1 0
0 0 0 0 0
0 0 0
0 0 0
0 0