ST STM32F101 Series Reference Manual page 118
Advanced arm-based 32-bit mcus
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- Reference manual (1128 pages) ,
- User manual (14 pages) ,
- Application note (29 pages)
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DMA controller (DMA)
Table 30.
DMA - register map and reset values (continued)
Offset
Register
DMA_CMAR2
028h
Reset value
0
02Ch
DMA_CCR3
030h
Reset value
DMA_CNDTR3
034h
Reset value
DMA_CPAR3
038h
Reset value
0
DMA_CMAR3
03Ch
Reset value
0
040h
DMA_CCR4
044h
Reset value
DMA_CNDTR4
048h
Reset value
DMA_CPAR4
04Ch
Reset value
0
DMA_CMAR4
050h
Reset value
0
054h
DMA_CCR5
058h
Reset value
DMA_CNDTR5
05Ch
Reset value
DMA_CPAR5
060h
Reset value
0
DMA_CMAR5
064h
Reset value
0
068h
DMA_CCR6
06Ch
Reset value
118/501
0
0
0
0
0
0
0
0
0
Reserved
Reserved
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reserved
Reserved
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reserved
Reserved
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reserved
MA[31:0]
0
0
0
0
0
0
0
0
0
Reserved
0
0
0
0
0
PA[31:0]
0
0
0
0
0
0
0
0
0
MA[31:0]
0
0
0
0
0
0
0
0
0
Reserved
0
0
0
0
0
PA[31:0]
0
0
0
0
0
0
0
0
0
MA[31:0]
0
0
0
0
0
0
0
0
0
Reserved
0
0
0
0
0
PA[31:0]
0
0
0
0
0
0
0
0
0
MA[31:0]
0
0
0
0
0
0
0
0
0
Reserved
0
0
0
0
0
0
0
0
0
0
M
PL
PSIZE
SIZE
[1:0]
[1:0]
[1:0]
0
0
0
0
0
0
0
0
NDT[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
M
PL
PSIZE
SIZE
[1:0]
[1:0]
[1:0]
0
0
0
0
0
0
0
0
NDT[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
M
PL
PSIZE
SIZE
[1:0]
[1:0]
[1:0]
0
0
0
0
0
0
0
0
NDT[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
M
PL
PSIZE
SIZE
[1:0]
[1:0]
[1:0]
0
0
0
0
0
0
0
0
RM0008
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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