Motorola DSP56367 User Manual page 93

24-bit digital signal processor
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Table 3-11 DRAM Page Mode Timings, Three Wait States
No.
131
Page mode cycle time for two consecutive accesses of the same
direction
Page mode cycle time for mixed (read and write) accesses
132
CAS assertion to data valid (read)
133
Column address valid to data valid (read)
134
CAS deassertion to data not valid (read hold time)
135
Last CAS assertion to RAS deassertion
136
Previous CAS deassertion to RAS deassertion
137
CAS assertion pulse width
138
Last CAS deassertion to RAS assertion
BRW[1:0] = 00
BRW[1:0] = 01
BRW[1:0] = 10
BRW[1:0] = 11
139
CAS deassertion pulse width
140
Column address valid to CAS assertion
141
CAS assertion to column address not valid
142
Last column address valid to RAS deassertion
143
WR deassertion to CAS assertion
144
CAS deassertion to WR assertion
145
CAS assertion to WR deassertion
146
WR assertion pulse width
147
Last WR assertion to RAS deassertion
148
WR assertion to CAS deassertion
149
Data valid to CAS assertion (write)
MOTOROLA
Characteristics
5
DSP56367
External Memory Expansion Port (Port A)
Symbol
Expression
2 × T
t
PC
C
1.25 × T
2 × T
− 7.0
t
CAC
C
3 × T
− 7.0
t
AA
C
t
OFF
2.5 × T
− 4.0
t
RSH
C
4.5 × T
− 4.0
t
RHCP
C
2 × T
− 4.0
t
CAS
C
2.25 × T
t
CRP
C
3.75 × T
C
4.75 × T
C
6.75 × T
C
1.5 × T
− 4.0
t
CP
C
− 4.0
t
T
ASC
C
2.5 × T
− 4.0
t
CAH
C
4 × T
− 4.0
t
RAL
C
1.25 × T
t
RCS
C
0.75 × T
t
RCH
C
2.25 × T
t
WCH
C
3.5 × T
− 4.5
t
WP
C
3.75 × T
t
RWL
C
3.25 × T
t
CWL
C
0.5 × T
− 4.0
t
DS
C
Specifications
Ma
Min
Unit
x
40.0
ns
35.0
C
13.0
ns
23.0
ns
0.0
ns
21.0
ns
41.0
ns
16.0
ns
− 6.0
ns
− 6.0
ns
− 6.0
41.5
ns
− 6.0
61.5
ns
11.0
ns
6.0
ns
21.0
ns
36.0
ns
− 4.0
8.5
ns
− 4.0
3.5
ns
− 4.2
18.3
ns
30.5
ns
− 4.3
33.2
ns
− 4.3
28.2
ns
1.0
ns
3-27

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