Characteristics Of The Spi Bus - Motorola DSP56367 User Manual

Host Accessible
SCK/SCL
MISO/SDA
MOSI/HA0
Pin
Control
Logic
SS/HA2
HREQ
Figure 9-1 Serial Host Interface Block Diagram
9.3

CHARACTERISTICS OF THE SPI BUS

The SPI bus consists of two serial data lines (MISO and MOSI), a clock line (SCK), and a
Slave Select line (SS). During an SPI transfer, a byte is shifted out one data pin while a
different byte is simultaneously shifted in through a second data pin. It can be viewed as two
8-bit shift registers connected together in a circular manner, with one shift register on the
master side and the other on the slave side. Thus the data bytes in the master device and slave
device are exchanged. The MISO and MOSI data pins are used for transmitting and receiving
serial data. When the SPI is configured as a master, MISO is the master data input line, and
MOSI is the master data output line. When the SPI is configured as a slave device, MISO is
the slave data output line, and MOSI is the slave data input line.
MOTOROLA
Clock
Generator
Controller
Logic
INPUT/OUTPUT Shift Register
Slave
Address
Recognition
Unit
(SAR)
DSP56367
Serial Host Interface
Characteristics Of The SPI Bus
DSP Accessible
HCKR
HCSR
HTX
(IOSR)
HRX
(FIFO)
HSAR
24 BIT
DSP
Global
Data
Bus
DSP
DMA
Data
Bus
AA0416
9-3