Table of Contents
Advertisement
Digital Audio Transmitter
DAX Internal Architecture
Frame
#000 #001
#002
#003
#004
XADE
XBLK
Frame
#024 #025
#026
#027
#028
XADE
XBLK
Frame
#168 #169
#170
#171
#172
XADE
XBLK
12.5.7.4
XSTR Reserved Bits—Bits 3–23
These XSTR bits are reserved. They read as 0, and should be written with 0 to ensure
compatibility with future device versions.
12.5.8
DAX PARITY GENERATOR (PRTYG)
The PRTYG generates the parity bit for the subframe being transmitted. The generated parity
bit ensures that subframe bits four to thirty-one will carry an even number of ones and zeroes.
12.5.9
DAX BIPHASE ENCODER
The DAX biphase encoder encodes each audio and non-audio bit into its biphase mark format
and shifts this encoded data out to the ADO output pin synchronously to the biphase clock.
12.5.10 DAX PREAMBLE GENERATOR
The DAX preamble generator automatically generates one of three preambles in the 8-bit
preamble shift register at the beginning of each subframe transmission, and shifts it out. The
generated preambles always start with "0". Bit patterns of preambles generated in the
12-10
#005
#006
#007
#008
#009 #010
#029
#030
#031
#032
#033 #034
#173
#174
#175
#176
#177 #178
Figure 12-3 DAX Relative Timing
DSP56367
#011
#012
#013
#014
#015
#016
#035
#036
#037
#038
#039
#040
#179
#180
#181
#182
#183
#184
#017
#018
#019 #020
#021
#022 #023
#041
#042
#043 #044
#045
#046 #047
#185
#186
#187 #188
#189
#190 #191
AA0608
MOTOROLA
Advertisement
Table of Contents
