Section 8 Host Interface (Hdi08) - Motorola DSP56367 User Manual

24-bit digital signal processor
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SECTION
HOST INTERFACE (HDI08)
8.1
INTRODUCTION
The host interface (HDI08) is a byte-wide, full-duplex, double-buffered, parallel port that can
be connected directly to the data bus of a host processor. The HDI08 supports a variety of
buses and provides glueless connection with a number of industry standard microcomputers,
microprocessors, DSPs and DMA hardware.
The host bus can operate asynchronously to the DSP core clock, therefore the HDI08 registers
are divided into 2 banks. The host register bank is accessible to the external host and the DSP
register bank is accessible to the DSP core.
The HDI08 supports three classes of interfaces:
Host processor/Microcontroller (MCU) connection interface
DMA controller interface
General purpose I/O (GPIO) port
8.2
HDI08 FEATURES
8.2.1
INTERFACE - DSP SIDE
Mapping:
– Registers are directly mapped into eight internal X data memory locations
Data Word:
– 24-bit (native) data words are supported, as are 8-bit and 16-bit words
Transfer Modes:
– DSP to Host
– Host to DSP
MOTOROLA
8
DSP56367
8-1

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