Motorola DSP56367 User Manual page 239

24-bit digital signal processor
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A device generating a signal is called a transmitter, and a device receiving a signal is called a
receiver. A device controlling a signal is called a master and devices controlled by the master
are called slaves. A master receiver must signal an end-of-data to the slave transmitter by not
generating an acknowledge on the last byte clocked out of the slave device. In this case the
transmitter must leave the data line high to enable the master to generate the stop event.
Handshaking may also be accomplished by using the clock synchronizing mechanism. Slave
devices can hold the SCL line low, after receiving and acknowledging a byte, to force the
master into a wait state until the slave device is ready for the next byte transfer. The SHI
supports this feature when operating as a master device and waits until the slave device
releases the SCL line before proceeding with the data transfer.
2
9.6.2
I
C DATA TRANSFER FORMATS
2
I
C bus data transfers follow the following process: after the start event, a slave device
address is sent. The address consists of seven address bits and an eighth bit as a data direction
bit (R/W). In the data direction bit, zero indicates a transmission (write), and one indicates a
request for data (read). A data transfer is always terminated by a stop event generated by the
master device. However, if the master device still wishes to communicate on the bus, it can
generate another start event, and address another slave device without first generating a stop
event (the SHI does not support this feature when operating as an I
method is also used to provide indivisible data transfers. Various combinations of read/write
formats are illustrated in Figure 9-10 and Figure 9-11.
S
Slave Address
Start
Bit
Figure 9-10 I
MOTOROLA
ACK from
Slave Device
0
A
First Data Byte
R/W
AA0425
2
C Bus Protocol For Host Write Cycle
DSP56367
Characteristics Of The I
2
C master device). This
ACK from
Slave Device
A
Data Byte
N = 0 to M
Data Bytes
Serial Host Interface
2
C Bus
ACK from
Slave Device
A
S, P
Start or
Stop Bit
9-21

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