Dax Audio Data Buffers (Xadbufa / Xadbufb) - Motorola DSP56367 User Manual

Digital Audio Transmitter
DAX Internal Architecture
12.5.2

DAX AUDIO DATA BUFFERS (XADBUFA / XADBUFB)

XADBUFA and XADBUFB are 24-bit registers that buffer XADR from XADSR, creating a
FIFO-like data path. These registers hold the next two subframes of audio data to be
transmitted. Channel A audio data is transferred from XADR to XADBUFA if XADBUFA is
empty. Channel B audio data is transferred from XADR to XADBUFB if XADBUFB is
empty. Audio data is transferred from XADBUFA and XADBUFB alternately to XADSR
provided that XADSR shifted out all the audio and non-audio bits of the currently transmitted
channel. This buffering mechanism provides more cycles for writing the next audio data to
XADR. These registers are not directly accessible by DSP instructions.
12.5.3 DAX AUDIO DATA SHIFT REGISTER (XADSR)
The XADSR is a 27-bit shift register that shifts the 24-bit audio data and the 3-bit non-audio
data for one subframe. The contents of XADBUFA or XADBUFB are directly transferred to
the XADSR at the beginning of the subframe transmission. The channel A subframe is
transferred to XADSR at the same time that the three bits of non-audio data (V-bit, U-bit and
C-bit) for channel A in the DAX non-audio data register (XNADR) are transferred to the three
highest-order bits of the XADSR. At the beginning of the channel B transmission, audio and
non-audio data for channel B are transferred from the XADBUFB and the XNADBUF to the
XADSR for shifting. The data in the XADSR is shifted toward the lowest-order bit at the fifth
to thirty-first bit slot of each subframe transmission. This register is not directly accessible by
DSP instructions.
12.5.4 DAX NON-AUDIO DATA REGISTER (XNADR)
The XNADR is a 24-bit write-only register. It holds the three bits of non-audio data for each
subframe. XNADR can be accessed by core instructions or by DMA. The contents of the
XNADR are shown in Figure 12-2. XNADR is not affected by any of the DAX reset states.
The XNADR bits are described in the following paragraphs.
12.5.4.1 DAX Channel A Validity (XVA)—Bit 10
The value of the XVA bit is transmitted as the twenty-ninth bit (Bit 28) of channel A subframe
in the next frame.
12.5.4.2 DAX Channel A User Data (XUA)—Bit 11
The value of the XUA bit is transmitted as the thirtieth bit (Bit 29) of the channel A subframe
in the next frame.
12-6 DSP56367 MOTOROLA