Motorola DSP56367 User Manual page 123

24-bit digital signal processor
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Table 3-19 Serial Host Interface SPI Protocol Timing (Continued)
No.
Characteristics
157
First SCK sampling edge to HREQ output
deassertion
158
Last SCK sampling edge to HREQ output
not deasserted (CPHA = 1)
159
SS deassertion to HREQ output not
deasserted (CPHA = 0)
160
SS deassertion pulse width (CPHA = 0)
161
HREQ in assertion to first SCK edge
162
HREQ in deassertion to last SCK sampling
edge (HREQ in set-up time) (CPHA = 1)
163
First SCK edge to HREQ in not asserted
(HREQ in hold time)
= 1.8 V ± 5%; T
Note:
1.
V
CC
2.
Periodically sampled, not 100% tested
MOTOROLA
Serial Host Interface SPI Protocol Timing
Filter
1
Mode
Mode
Slave
Bypassed
Narrow
Wide
Slave
Bypassed
Narrow
Wide
Slave
Slave
Maste
Bypassed
r
Narrow
Wide
Maste
r
Maste
r
= 0°C to +95°C, C
= 50 pF
J
L
DSP56367
Expression
2.5×T
+30
C
2.5×T
+120
C
2.5×T
+217
C
2.5×T
+30
C
2.5×T
+80
C
2.5×T
+136
C
2.5×T
+30
C
T
+6
C
0.5 × t
+
SPICC
2.5×T
+43
C
0.5 ×t
+
SPICC
2.5×T
+43
C
0.5 ×t
+
SPICC
2.5×T
+43
C
0
0
Specifications
Min
Max
Unit
50.8
ns
140.8
ns
237.8
ns
50.8
ns
100.8
ns
156.8
ns
50.8
ns
14.3
ns
111.8
ns
164.8
ns
200.3
ns
0
ns
0
ns
3-57

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