Table of Contents
Advertisement
Programmer's Reference
Reg
Num Mnemonic
HORX 23-0
DSP Receive Data
Register
HOTX 23-0
DSP Transmit Data
Register
HDR 15-0
D15-D0
GPIO Pin Data
HDDR 15-0
DR15-DR0 GPIO Pin Direction
ICR
0
RREQ
Receive Request Enable
1
TREQ
Transmit Request Enable
2
HDRQ
Double Host Request
3
HF0
Host Flag 0
4
HF1
Host Flag 1
5
HLEND
Host Little Endian
6-5
HM1-HM0 Host Mode Control
7
INIT
Initialize
ISR
0
RXDF
Receive Data Register
Full
1
TXDE
Transmit Data Register
Empty
2
TRDY
Transmitter Ready
3
HF2
Host Flag2
4
HF3
Host Flag3
7
HREQ
Host Request
CVR
6-0
HV6-HV0
Host Command Vector
7
HC
Host Command
RXH/
7-0
Host Receive Data
M/L
Register
TXH/
7-0
Host Transmit Data
M/L
Register
IVR
7-0
IV7-IV0
Interrupt Register
D-14
Table D-4 HDI08 Programming Model
Bit
Name
Val
0
Input
1
Output
Host Side
0
HRRQ interrupt disabled
1
HRRQ interrupt enabled
0
HTRQ interrupt disabled
1
HTRQ interrupt enabled
0
HOREQ/HTRQ=HOREQ,
HACK/HRRQ=HACK
1
HOREQ/HTRQ=HTRQ,
HACK/HRRQ=HRRQ
0
"Big Endian" order
1
"Little Endian" order
00
Interrupt Mode
01
24-bit DMA enabled
10
16-bit DMA enabled
11
8-bit DMA enabled
1
Reset data paths according to
TREQ and RREQ
0
host receive register is empty
1
host receive register is full
1
host transmit register empty
0
host transmit register full
1
transmit FIF O (6 deep) is
empty
0
transmit FIFO is not empty
0
HOREQ pin is deasserted
1
HOREQ pin is asserted (if
enabled)
0
no host command pending
1
host command pending
68000 family vector register
DSP56367
Comments
Function
available if
HDM2-HDM0=000
available if
HDM2-HDM0=000
available if
HDM2-HDM0=100
cleared by HDI08
hardware
default vector
cleared by HDI08
hardware when the HC
int. req. is serviced
Reset Type
HW /
IR
ST
SW
empty
empty
$0000
-
-
$0000
-
-
0
-
-
0
-
-
0
-
-
0
-
-
0
-
-
0
-
-
00
-
-
0
-
-
0
0
0
1
1
1
1
1
1
0
-
-
0
-
-
0
0
0
$2A
-
-
0
0
0
empty
empty
$0F
-
-
MOTOROLA
Advertisement
Table of Contents
