Motorola DSP56367 User Manual page 101

Table 3-13 DRAM Out-of-Page and Refresh Timings, Four Wait States
No.
Characteristics
188 WR assertion to CAS assertion
189 CAS assertion to RAS assertion
(refresh)
190 RAS deassertion to CAS assertion
(refresh)
191 RD assertion to RAS deassertion
192 RD assertion to data valid
193
RD deassertion to data not valid
194 WR assertion to data active
195 WR deassertion to data high
impedance
Note: 1. The number of wait states for out of page access is specified in the DCR.
2. The refresh period is specified in the DCR.
3. RD deassertion will always occur after CAS deassertion; therefore, the restricted timing is t
and not t
GZ
4. Reduced DSP clock speed allows use of DRAM out-of-page access with four Wait states (See
Figure 2-17
Table 3-14 DRAM Out-of-Page and Refresh Timings, Eight Wait States
No.
Characteristics
157 Random read or write cycle time
158 RAS assertion to data valid (read)
159 CAS assertion to data valid (read)
160 Column address valid to data valid
(read)
MOTOROLA
3
Symbol
t
WCS
t
CSR
t
RPC
t
ROH
t
GA
3
t
GZ
.
.).
4
Symbol
t
RC
t
RAC
t
CAC
t
AA
DSP56367
External Memory Expansion Port (Port A)
20 MHz
Expression
Min
3 × T − 4.3
145.7
C
0.5 × T − 4.0
21.0
C
1.25 × T − 4.0
58.5
C
4.5 × T − 4.0
221.0
C
4 × T − 7.5
—
C
0.0
0.75 × T − 0.3
37.2
C
0.25 × T
—
C
66 MHz
3
Expression
Min
9 × T
136.4
C
4.75 × T − 7.5
—
C
4.75 × T − 6.5
—
C
2.25 × T − 7.5
—
C
2.25 × T − 6.5
—
C
3 × T − 7.5
—
C
3 × T − 6.5
—
C
Specifications
4 4
30 MHz
Max Min Max
— 95.7 —
— 12.7 —
— 37.7 —
— 146.0 —
192.5 — 125.8
— 0.0 —
— 24.7 —
12.5 — 8.3
80 MHz
Max Min Max
— 112.5 —
64.5 — —
— — 52.9
26.6 — —
— — 21.6
40.0 — —
— — 31.0
3-35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
OFF
Unit
ns
ns
ns
ns
ns
ns
ns