Tcr Esai Transmit 3 Enable (Te3) - Bit 3 - Motorola DSP56367 User Manual

24-bit digital signal processor
Table of Contents

Advertisement

state. The on-demand mode transmit enable sequence can be the same as the normal mode, or
TE2 can be left enabled.
10.3.2.4

TCR ESAI Transmit 3 Enable (TE3) - Bit 3

TE3 enables the transfer of data from TX3 to the transmit shift register #3. When TE3 is set
and a frame sync is detected, the transmit #3 portion of the ESAI is enabled for that frame.
When TE3 is cleared, the transmitter #3 is disabled after completing transmission of data
currently in the ESAI transmit shift register. Data can be written to TX3 when TE3 is cleared
but the data is not transferred to the transmit shift register #3.
The SDO3/SDI2 pin is the data input pin for RX2 if TE3 is cleared and RE2 in the RCR
register is set. If both RE2 and TE3 are cleared the transmitter and receiver are disabled, and
the pin is tri-stated. Both RE2 and TE3 should not be set at the same time.
The normal mode transmit enable sequence is to write data to one or more transmit data
registers before setting TEx. The normal transmit disable sequence is to clear TEx, TIE and
TEIE after TDE equals one.
In the network mode, the operation of clearing TE3 and setting it again disables the
transmitter #3 after completing transmission of the current data word until the beginning of
the next frame. During that time period, the SDO3/SDI2 pin remains in the high-impedance
state. The on-demand mode transmit enable sequence can be the same as the normal mode, or
TE3 can be left enabled.
10.3.2.5
TCR ESAI Transmit 4 Enable (TE4) - Bit 4
TE4 enables the transfer of data from TX4 to the transmit shift register #4. When TE4 is set
and a frame sync is detected, the transmit #4 portion of the ESAI is enabled for that frame.
When TE4 is cleared, the transmitter #4 is disabled after completing transmission of data
currently in the ESAI transmit shift register. Data can be written to TX4 when TE4 is cleared
but the data is not transferred to the transmit shift register #4.
The SDO4/SDI1 pin is the data input pin for RX1 if TE4 is cleared and RE1 in the RCR
register is set. If both RE1 and TE4 are cleared the transmitter and receiver are disabled, and
the pin is tri-stated. Both RE1 and TE4 should not be set at the same time.
The normal mode transmit enable sequence is to write data to one or more transmit data
registers before setting TEx. The normal transmit disable sequence is to clear TEx, TIE and
TEIE after TDE equals one.
In the network mode, the operation of clearing TE4 and setting it again disables the
transmitter #4 after completing transmission of the current data word until the beginning of
the next frame. During that time period, the SDO4/SDI1 pin remains in the high-impedance
MOTOROLA
Enhanced Serial Audio Interface (ESAI)
DSP56367
ESAI Programming Model
10-17

Advertisement

Table of Contents
loading

Table of Contents