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Host Interface (HDI08)
Servicing The Host Interface
8.7
SERVICING THE HOST INTERFACE
The HDI08 can be serviced by using one of the following protocols:
•
Polling,
•
Interrupts
8.7.1
HDI08 HOST PROCESSOR DATA TRANSFER
To the host processor, the HDI08 appears as a contiguous block of static RAM. To transfer
data between itself and the HDI08, the host processor performs the following steps:
1. Asserts the HDI08 address to select the register to be read or written.
2. Selects the direction of the data transfer. If it is writing, the host processor drives the
data on the bus.
3. Strobes the data transfer.
8.7.2
POLLING
In the polling mode of operation, the HOREQ/HTRQ signal is not connected to the host
processor and HACK must be deasserted to ensure IVR data is not being driven on H0-H7
when other registers are being polled.
The host processor first performs a data read transfer to read the ISR register.This allows the
host processor to assess the status of the HDI08:
1. If RXDF=1, the receive byte registers are full and therefore a data read can be
performed by the host processor.
2. If TXDE=1, the transmit byte registers are empty. A data write can be performed by
the host processor.
3. If TRDY=1, the transmit byte registers and the receive data register on the DSP side
are empty. Data written by the host processor is transferred directly to the DSP side.
•
4. If (HF2
HF3)
an application-specific state within the DSP core has been reached. Intervention by the
host processor may be required.
8-30
≠
0, depending on how the host flags have been defined, may indicate
DSP56367
MOTOROLA
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