Hpcr Host Address Strobe Polarity (Hasp) Bit 10 - Motorola DSP56367 User Manual

8.5.6.11

HPCR Host Address Strobe Polarity (HASP) Bit 10

If the HASP bit is cleared, the address strobe (HAS) signal is an active low input, and the
address on the host address/data bus is sampled when the HAS signal is low. If HASP is set,
HAS is an active high address strobe input, and the address on the host address/data bus 8 is
sampled when the HAS signal is high.
8.5.6.12 HPCR Host Multiplexed bus (HMUX) Bit 11
If the HMUX bit is set, the HDI08 latches the lower portion of a multiplexed address/data bus.
In this mode the internal address line values of the host registers are taken from the internal
latch. If HMUX is cleared, it indicates that the HDI08 is connected to a non-multiplexed type
of bus, and the address lines are taken from the HDI08 input signals.
8.5.6.13 HPCR Host Dual Data Strobe (HDDS) Bit 12
If the HDDS bit is cleared, the HDI08 operates in the single strobe bus mode. In this mode, the
bus has a single data strobe signal for both reads and writes. If HDDS is set, the HDI08
operates in the dual strobe bus mode. In this mode, the bus has two separate data strobes, one
for data reads, the other for data writes. See Figure 8-7 and Figure 8-8 for more information
on the two types of buses.
HRW
HDS
In the single strobe bus mode, the HDS (Data-Strobe) signal qualifies the access, while the
HRW (Read/Write) signal specifies the direction of the access.
Data
Write cycle
HWR
Data
Read cycle
HRD
In the dual strobe bus mode, there are separate HRD and HWR signals that specify the access
as being a read or write access, respectively.
MOTOROLA
Figure 8-7 Single strobe bus
Write data in
Read data out
Figure 8-8 Dual strobes bus
DSP56367
Host Interface (HDI08)
HDI08 – DSP-Side Programmer's Model
8-15