Esai_1 Time Slot Register (Tsr_1) - Motorola DSP56367 User Manual

Enhanced Serial Audio Interface 1 (ESAI_1)
ESAI_1 Programming Model

11.3.12 ESAI_1 TIME SLOT REGISTER (TSR_1)

The write-only Time Slot Register (TSR_1) is effectively a null data register that is used when
the data is not to be transmitted in the available transmit time slot. The transmit data pins of all
the enabled transmitters are in the high-impedance state for the respective time slot where
TSR_1 has been written. The Transmitter External Buffer Enable pin (FSR_1 pin when
SYN=1, TEBE=1, RFSD=1) disables the external buffers during the slot when the TSR_1
register has been written.
11.3.13 TRANSMIT SLOT MASK REGISTERS (TSMA_1, TSMB_1)
The Transmit Slot Mask Registers (TSMA_1 and TSMB_1) are two read/write registers used
by the transmitters in network mode to determine for each slot whether to transmit a data word
and generate a transmitter empty condition (TDE=1), or to tri-state the transmitter data pins.
TSMA_1 and TSMB_1 should each be considered as containing half a 32-bit register TSM_1.
See Figure 11-11 and Figure 11-12. Bit number N in TSM_1 (TS**) is the enable/disable
control bit for transmission in slot number N.
11
Y:$FFFF99 TS11
23
11
Y:$FFFF9A TS27
23
11-14
10 9 8 7
TS10 TS9 TS8 TS7
22 21 20 19
Reserved bit - read as zero; should be written with zero for future compatibility.
Figure 11-11 TSMA_1 Register
10 9 8 7
TS26 TS25 TS24 TS23
22 21 20 19
Reserved bit - read as zero; should be written with zero for future compatibility.
Figure 11-12 TSMB_1 Register
DSP56367
6 5 4 3
TS6 TS5 TS4 TS3
18 17 16 15
TS15
6 5 4 3
TS22 TS21 TS20 TS19
18 17 16 15
TS31
2 1 0
TS2 TS1 TS0
14 13 12
TS14 TS13 TS12
2 1 0
TS18 TS17 TS16
14 13 12
TS30 TS29 TS28
MOTOROLA