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Motorola DSP96002 User Manual

32-bit digital signal processor.
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DSP96002
32-BIT
USER'S MANUAL
Motorola, Inc.
Semiconductor Products Sector
DSP Division
6501 William Cannon Drive, West
Austin, Texas 78735-8598

   Related Manuals for Motorola DSP96002

   Summary of Contents for Motorola DSP96002

  • Page 1: Digital Signal Processor

    DSP96002 32-BIT DIGITAL SIGNAL PROCESSOR USER’S MANUAL Motorola, Inc. Semiconductor Products Sector DSP Division 6501 William Cannon Drive, West Austin, Texas 78735-8598...

  • Page 2

    The first family member is the DSP96002. The main characteristics of the DSP96002 are support of IEEE 754 Single Precision (8 bit Exponent and 24 bit Mantissa) and Single Extended Precision (11 bit Exponent and 32 bit Mantissa) Floating-Point and 32 bit signed and unsigned fixed point arithmetic, coupled with two identical external memory expansion ports.

  • Page 3

    1 - 2 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 4

    DSP96002 Technical Data Sheet (DSP96002/D). 2.1.1 Package The DSP96002 is available in a 223 pin PGA package. There are 176 signal pins (including 5 spares), 17 power pins and 30 ground pins. All packaging information is available in the data sheet.

  • Page 5

    Pinout Summary CPU Pins Package Power/Ground Planes Port A/B Pins Data and Address Bus Control TOTALS Figure 2-1. DSP96002 Functional Group Pin Allocation — — — – MODB/ B(Mode Select B/External Interrupt Request B) - active low input, internally synchronized to the input clock (CLK).

  • Page 6

    – MODC/ — — — — – CLOCK INPUT QUIET POWER V cc Figure 2-2. DSP96002 Functional Signal Groups OnCE is a trademark of Motorola Inc. MOTOROLA DSP96002 223 PINS DSP96002 USER’S MANUAL ADDRESS BUS B bA0-bA31 V ss DATA BUS B...

  • Page 7

    2 - 4 — — — — – T pin is deasserted. If — — — – C to exit the wait state. Two Wait State Instruction DSP96002 USER’S MANUAL — — — – C is asserted syn- MOTOROLA...

  • Page 8

    This pin when asserted causes the DSP96002 to finish the current instruction being executed, save the instruction pipe- line information, enter the debug mode and wait for commands to be entered from the debug serial input line.

  • Page 9

    — (Read/Write)- three-state, active low output when a bus master, active low input when not a bus master. Bus master timing is the same as the DSP96002 address lines, giving EXTERNAL MEMORY AND MAPPING P only...

  • Page 10

    A0-A31, S1, S0, bus write transfer is taking place. During a read cycle, input data is latched inside the DSP96002 on the rising edge of the data bus after control for external data bus buffers if they are present. If the external bus is not used...

  • Page 11

    Figure 2-4. Bus Status Encoding — – (Transfer Acknowledge) - active low input. If the DSP96002 is the bus master and either there is no external bus activity or the DSP96002 is not the bus master, the is ignored by the core. The extend an external bus cycle indefinitely.

  • Page 12

    S and A must be tied high to disable the Host — – — – A is asserted, S is ignored. DSP96002 USER’S MANUAL — – E is asserted to enable — – E is to allow mul- — –...

  • Page 13

    DMA is requesting bus mastership. longer needs the bus. the DSP96002 is a bus master or a bus slave. Bus "parking" allows deasserted even though the DSP96002 is the bus master. See the description of bus "parking" in the Section seven) allows CPU or DMA does not need the bus.

  • Page 14

    B is negated by the previous bus master, indicating that — – A is asserted when the CPU or DMA has taken the — – A is asserted, the DSP96002 is the owner of the — – A is negated, the DSP96002 is a bus slave. — –...

  • Page 15

    The external bus timing is defined by the operation of the Address Bus, Data Bus and Bus Control pins described in paragraph 2.1.5. The DSP96002 external ports are designed to interface with a wide variety of memory and peripheral devices, high speed static RAMs, dynamic RAMs and video RAMs as well as slower memory devices.

  • Page 16

    3:6. When the Transfer Strobe in the destination device. At the end of a read cycle, the DSP96002 latches the data inter- nally. At the end of a write cycle, the external memory latches the data. The Address signals remain stable until the first phase of the next external bus cycle to minimize power dissipa- tion.

  • Page 17

    E signal is delayed by the OR gate. DSP96002 USER’S MANUAL — – S instead of from the address STATIC RAM — — – — – E) as the write strobe. The DSP96002 — – S. This form is the one used MOTOROLA — – —...

  • Page 18

    B is monitored by all potential bus masters — – A. This signal controls the hand-over of — – B is asserted if the Bus Acknowledge signal DSP96002 USER’S MANUAL — – B is a system arbitration signal. — – A asserted for the dura- —...

  • Page 19

    The DSP96002 has 2 control bits and one status bit, located in the Bus Control Registers (see Section 7) to permit software control of the If the RH bit in the BCR register is cleared, the DSP96002 asserts its for bus transfers are pending or being attempted.

  • Page 20

    — – — – Figure 2-7. Bus Arbitration Scheme 5.16.2 Bus Handshake Unit The bus handshake unit in the DSP96002 is implemented within a finite state machine. It consists of two — – — – external outputs ( (ext_acc_req, end_of_sequence, RH) (see Figure 2-8). The ext_acc_req signal is asserted when one or more requests for external bus access are pending, and remains asserted as long as the transfers are being executed.

  • Page 21

    G & — – — – G & — – — – G & – — – G & end_of_sequence DSP96002 USER’S MANUAL IDLE — – — – PARKING_ MASTER — – — – (note 1) (note 1) (note 3)

  • Page 22

    — WW = ^ext_acc_req & ^ Notes: 1. Illegal arcs in DSP96002 since once the request of the bus is pending, it will not be canceled before the execution of the access. 2. Non-existent arc since if ext_acc_req arrives together with the negation of becomes active master and begins its bus transfers.

  • Page 23

    R; the arbiter asserts the requesting devices’ — – R; if the bus arbiter leaves — – A will remain asserted. This condition is called bus DSP96002 USER’S MANUAL — – A. If a read-modify-write (RMW) in- — – G, then —...

  • Page 24: Data Buses

    INTRODUCTION The DSP96002 architecture is a 32-bit highly-parallel multiple-bus IEEE floating-point processor. The ar- chitecture is designed to accommodate various IC family members with different memory and on-chip pe- ripheral requirements while maintaining a standard programmable core. The overall chip architecture is presented and detailed block diagrams of the Data ALU and Address Generation Unit AGU) core architec- ture are described.

  • Page 25: Address Buses

    Figure 3-1. DSP96002 Block Diagram 3.2.2 Address Buses Addresses are specified for internal X Data Memory and Y Data Memory on two unidirectional 32-bit buses, X Address Bus (XAB) and Y Address Bus (YAB). Internal address bus sizes depend on the amount of in- ternal memory implemented.

  • Page 26: X Data Memory

    XDB. The X memory is a dual-access memory in the sense that it may be accessed twice during a cycle: once by the core and once by the DMA. X memory may be expanded off chip. MOTOROLA DSP96002 USER’S MANUAL 3 - 3...

  • Page 27: Y Data Memory

    PC and LA registers, discussed below). The loop flag bit is pulled from the system stack when a loop is terminated and indicates if the terminated loop was a nested loop. 3 - 4 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 28: Program Memory

    3.2.9 External Bus Interfaces The DSP96002 has two identical external bus interfaces. Each bus interface has a 32-bit wide address bus and a 32-bit wide data bus, and may be used to access external Data Memory, Program Memory or I/O devices.

  • Page 29

    16 words in the host processor address space. Separate transmit and receive data registers are double- buffered to allow the DSP96002 and host processor to efficiently transfer data at high speed. Host proces- sor communication with the HI is accomplished using standard Host processor data move instructions and addressing modes.

  • Page 30

    3.3.1 Multiply Unit The Multiplier is one of the two arithmetic processing units of the Data ALU and performs all the floating- point multiplications as well as signed/unsigned fixed-point (integer) multiplications on the data operands. MOTOROLA DSP96002 USER’S MANUAL 3 - 7...

  • Page 31

    Multiplier and with the XDB and YDB activity. The operation of the fixed-point Adder occurs independently and in parallel with the XDB and YDB activity. The Data ALU registers provide pipelining for both Data ALU Adder inputs and outputs. 3 - 8 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 32

    When used in fixed-point shifts the Barrel Shifter performs the follow- ing operations: • single and multibit arithmetic shift left or right (ASL #n, ASR #n) • single and multibit logical shift left or right (LSL #n, LSR #n) MOTOROLA DSP96002 USER’S MANUAL 3 - 9...

  • Page 33

    IEEE standard. The DSP96002 is not able to perform operations on de- normalized numbers in a single cycle when in IEEE mode, except for operations done in the floating point adder when the operand is a denormalized number in SEP.

  • Page 34

    Each of two Modifier Register Files consists of four 32-bit registers. The two files contain the modifier reg- isters M0-M3 and M4-M7 respectively, and usually specify the type of modification made to an address reg- MOTOROLA CAUTION CAUTION DSP96002 USER’S MANUAL 3 - 11...

  • Page 35

    LEA instruction. In each of these cases, an address register is accessed, updated by its respective modulo arithmetic unit, and stored in TempR in 3 - 12 Figure 3-3. AGU Block Diagram CAUTION DSP96002 USER’S MANUAL MOTOROLA...

  • Page 36

    The address output multiplexers select the source for the XAB, YAB, and PAB. They allow the XAB, YAB, or PAB address outputs to originate from either R0-R3, R4-R7, or from TempR Low or TempR High. The MOTOROLA DSP96002 USER’S MANUAL 3 - 13...

  • Page 37

    DMA and the AGU. The output multiplexers are time multi- plexed – the first half instruction cycle is assigned to DMA transfers while the second half cycle is assigned to core transfers. 3 - 14 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 38

    Figure 3-4. Modulo Arithmetic Unit Block Diagram MOTOROLA DSP96002 USER’S MANUAL 3 - 15...

  • Page 39

    3 - 16 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 40

    • Program Controller The DSP96002 instruction set has been designed to allow flexible control of these parallel processing re- sources. Many instructions allow the programmer to keep each unit busy, thus enhancing program execu- tion speed. The programming model is shown in Figure 4-1 and Figure 4-2, and is described in the following sections.

  • Page 41

    D3.H D2.H D1.H D0.H Figure 4-2. DSP96002 Programming Model – Data ALU and Address Generation Unit DATA ALU REGISTER FILE (D0-D9) The ten registers, D0-D9, are 96-bits wide and may be treated as thirty independent 32-bit registers or as ten 96-bit floating-point registers. Each 96-bit register is divided into three sub-registers: high, middle and low.

  • Page 42

    When specifying modulo arithmetic, a modifier register will also spec- ify the modulo value to be used. Refer to Section 5.8 for a description of the modifier types. A modifier reg- MOTOROLA DSP96002 USER’S MANUAL 4 - 3...

  • Page 43

    The standard definition of the IER bits and the complete IER exception flag computa- tion rules are given in Section A.5. It is strongly recommended that users of the DSP96002 obtain and com- prehend the ANSI/IEEE Standard 754-1985 so that the full advantage of the standard can be realized.

  • Page 44

    SIOP MOTOROLA SOVF SUNF SDZ SINX Figure 4-3. SR Format DSP96002 USER’S MANUAL Reserved Multiply Flush to Zero Interrupt Mask Reserved Loop Flag IEEE Inexact IEEE Divide-by Zero IEEE Underflow IEEE Overflow IEEE Invalid Operation Rounding Mode Reserved Inexact Divide-by Zero...

  • Page 45

    Dn register differs from the unrounded intermediate result mantissa, a loss of accuracy has occurred and the INX bit will be set. The INX bit is not affected by fixed point operations. The INX bit is cleared during processor reset. 4 - 6 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 46

    4.7.10 ER Divide-by-Zero (DZ) Bit 9 The DZ flag in the DSP96002 can be set by software as part ofo an FDIV routine. No single DSP96002 in- struction can set the DZ flag. The DZ bit is cleared during processor reset and during all floating-point in- structions.

  • Page 47

    The rounding mode bits R1 and R0 specify the way in which inexact results should be rounded in floating point operations. The rounding mode bits are cleared during processor reset. R1 R0 Rounding Mode Round to Nearest Even (default) Round toward Zero Round toward -Infinity Round toward +Infinity 4 - 8 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 48

    The Data ALU performs rounding of the result to the precision specified by the instruction. The DSP96002 supports only single extended and single precision results. The DSP96002 implements all four rounding modes specified by the IEEE standard. These modes are round to nearest (RN), round toward zero (RZ), round toward plus infinity (RP) and round toward minus infinity (RM).

  • Page 49

    DO instruction and unstacked by end of loop processing or by execution of an ENDDO in- struction. When the instruction word at the address contained in this register is fetched, the contents of LC 4 - 10 Exceptions masked None IPL 0 IPL 0,1 IPL 0,1,2 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 50

    The stack pointer (SP) points to the last used place on the stack. Immediately after hardware reset these bits are cleared (SP=0), indicating that the stack is empty. Figure 4-4. Stack Pointer Format MOTOROLA DSP96002 USER’S MANUAL Stack Pointer Stack Error Flag Underflow Flag...

  • Page 51

    Stack location 1. Double pull causes underflow. Stack location 2. Stack location 13. Stack location 14. Double push causes overflow. Stack location 15. (Stack full). Push causes overflow. Stack overflow condition. Stack overflow condition after double push. DSP96002 USER’S MANUAL MOTOROLA...

  • Page 52

    $000007FF in the X and Y memory spaces. When DE is cleared, the $00000200 to $000007FF space is part of the external X and Y data spaces and the on-chip Data ROMs are disabled (see the DSP96002 data memory maps in Section 9.2 for additional details).

  • Page 53

    4 - 14 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 54

    The bit weighting for signed integers is presented in Figure 5-1. The bit weighting for unsigned integers is presented in Figure 5-2. The DSP96002 does not support direct operations on Long Word Integers but they can be produced as result of some ALU operations or as a result of a Long Move.

  • Page 55

    Figure 5-1. Bit Weighting and Alignment of Signed Integer Operands 31 30 63 62 Figure 5-2. Bit Weighting and Alignment of Unsigned Integer Operands 5 - 2 DSP96002 USER’S MANUAL SIGNED WORD INTEGER SIGNED LONG WORD INTEGER UNSIGNED WORD INTEGER UNSIGNED LONG WORD INTEGER...

  • Page 56

    23 22 23-Bit 8-Bit Fraction Exponent 52-Bit Fraction ( E +127) x 1.f DSP96002 USER’S MANUAL = -126 = +1023. For both SP and DP, E and NaN’s. SINGLE REAL Sign of Significand DOUBLE REAL Sign of Significand 5 - 3...

  • Page 57

    = Fraction ... 52 Interpretation of Sign: Positive Mantissa: s = 0 Negative Mantissa: s = 1 5 - 4 -1+127) x 0.f -1+127) x 0.0 +1+127) x 1.0 +1+127) x 1. f 1x...xx recognized QNaN 0x...xx SNaN DSP96002 USER’S MANUAL MOTOROLA...

  • Page 58

    The least significant bit (LSB) is the right-most bit (bit 0) and the most significant bit (MSB) is bit 31 or 63 for integer operands. MOTOROLA -1+1023) x 0.f -1+1023) x 0.0 +1+1023) x 1.0 +1+1023) x 1.f 1x...xx Recognized QNaN 0x...xx SNaN DSP96002 USER’S MANUAL 5 - 5...

  • Page 59

    Figure 5-4. Data Format in the Floating Point Registers When a result of an internal operations (which is a single extended precision number in the DSP96002) is written into a Data ALU register or when writing single or double precision numbers represented in one of the memory data formats to a Data ALU register as a result of a MOVE operation, automatic format con- version to the internal double precision representation is performed.

  • Page 60

    Mantissa... i.f = 0.00...00 Signed Infinities: Bias of e ... n.a. e ... 2047 ($7FF) i ... 1 f ... Zero MOTOROLA 63 62 Biased Fraction Exponent (e-1023) x 1.f (-1022) x 0.f DSP96002 USER’S MANUAL 11 10 Zero 5 - 7...

  • Page 61

    LA and LC registers (LA:LC) for program looping. NOT-A-NUMBER IMPLEMENTATION When created by the DSP96002, Quiet Not-a-Numbers (QNaNs) represent the result of operations that have no mathematical interpretation (e.g. zero multiplied by infinity) or the result of operations involving a NaN operand as input.

  • Page 62

    If the number to be converted is a denormalized double preci- sion (SEP in the DSP96002) floating-point number, the V tag will be set. If such a number is to be used as an operand for floating-point operations, two cases arise depending on the state of the FZ (Flush-to-Zero) bit in the SR.

  • Page 63

    93 V - SET IF DENORMALIZED, CLEARED OTHERWISE 92 CLEARED 75 CLEARED 63 I - CLEARED IF DENORM. OR ZERO, SET OTHERWISE 10 CLEARED 0 CLEARED Figure 5-5. Conversion to Double Precision Internal Data Format 5 - 10 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 64

    The DSP96002 does not support double precision. It does support single extended precision. 5.5.2 Conversion to the Memory Formats Conversions from the internal double precision format to either of the two memory floating-point formats is performed whenever a data register is to be stored in memory or any other location external to the Data ALU.

  • Page 65

    Register references (called R references) are references to the Data ALU, Address Generation Unit and Program Controller registers. Data may be read from one register and written into another register. 5 - 12 Single Precision Memory Format Double Precision Memory Format DSP96002 USER’S MANUAL MOTOROLA...

  • Page 66

    Refer to Section 5.7 for a description of the addressing modes. The effective address provides a common read/write control for both memory spaces. Data may be read from memory to a register or from a register to memory. MOTOROLA DSP96002 USER’S MANUAL 5 - 13...

  • Page 67

    ADDRESSING MODES The DSP96002 instruction set contains a full set of operand addressing modes. All address calculations are performed in the Address Generation Unit to minimize execution time and loop overhead. Addressing modes specify whether the operand(s) is in a register or memory and provide the specific ad- dress of the operand(s).

  • Page 68

    Nn. The content of Nn is treated as a 2’s complement number and can therefore be interpreted as signed or unsigned (see Section 5.8.1). The contents of the Rn and Nn registers are un- MOTOROLA DSP96002 USER’S MANUAL 5 - 15...

  • Page 69

    The special address modes do not use an address register in specifying an effective address. These modes specify the operand or the address of the operand in a field of the instruction or they implicitly ref- erence an operand. 5 - 16 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 70

    Figure 5-7 contains a summary of the addressing modes discussed in the previous paragraphs. ADDRESS MODIFIER TYPES The DSP96002 Address Generation Unit supports linear, modulo and bit-reversed address arithmetic for all address register indirect modes. Address modifiers determine the type of arithmetic used to update ad- dresses.

  • Page 71

    5 - 18 , such as 1024, 2048, 3072, etc. The use of addressing . The upper boundary is the lower bound- >= 24, thus k >= 5). The Mn register is loaded with the value 23 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 72

    XY = XY memory reference Figure 5-7. Addressing Modes Summary MOTOROLA Modifier P S C D A X Y L XY x x x DSP96002 USER’S MANUAL Operand Reference x x x x x x x x x x x x...

  • Page 73

    On the DSP96002, the upper and lower boundaries are not explicitly needed. If the address register pointer increments past the upper boundary of the buffer (base address plus M-1) it will wrap around to the base address. If the address decrements past the lower boundary (base address) it will wrap around to the base address plus M-1.

  • Page 74

    5.8.5 Address Modifier Type Encoding Summary Figure 5-8 contains a summary of the address modifier types discussed in the previous paragraphs. MOTOROLA DSP96002 USER’S MANUAL 5 - 21...

  • Page 75

    Modulo Modulo Modulo 16,777,215 Modulo 16,777,216 reserved reserved reserved reserved reserved Multiple Wrap-Around Modulo 2 Multiple Wrap-Around Modulo 4 Multiple Wrap-Around Modulo 8 Multiple Wrap-Around Modulo 2**22 Multiple Wrap-Around Modulo 2**23 Linear (Modulo 2**32) DSP96002 USER’S MANUAL ((2**24)-1) (2**24) MOTOROLA...

  • Page 76

    Figure 5-8. Address Modifier Summary MOTOROLA DSP96002 USER’S MANUAL 5 - 23...

  • Page 77

    As indicated by the programming model in Chapter 4, the DSP96002 architecture can be viewed as three execution units operating in parallel (Data ALU, Address Generation Unit and Program Controller). The goal of the instruction set is to keep each of these units busy during each instruction cycle.

  • Page 78

    Scale a Floating-Point Operand (Single Precision) Scale a Floating-Point Operand (Single Extended Precision) Reciprocal Approximation Square Root Reciprocal Approximation Subtract (Single Precision) Subtract (Single Extended Precision) Transfer Floating-Point Register (Single Precision) Transfer Floating-Point Register (Single Extended Precision) Test a Floating-Point Operand DSP96002 USER’S MANUAL MOTOROLA...

  • Page 79

    Negate with Carry SETW Set an Operand SPLIT Extract a 16-Bit Integer SPLITB Extract an 8-Bit Integer Subtract SUBC Subtract with Carry Transfer Data ALU Register Test an Operand Figure 6-2. Fixed-Point Arithmetic Instructions MOTOROLA DSP96002 USER’S MANUAL 6 - 3...

  • Page 80

    Parallel moves are not allowed with any of these instructions. See Figure 6-4 for a list of the four bit manipulation instructions. BCLR Bit Test and Clear BSET Bit Test and Set BCHG Bit Test and Change BTST Bit Test Figure 6-4. Bit Manipulation Instructions 6 - 4 Figure 6-3. Logical Instructions DSP96002 USER’S MANUAL MOTOROLA...

  • Page 81

    PC and system stack. Branch instructions allow PC relative displacements needed for position independent code. See Figure 6-7 for a list of the thirty five program control instruc- tions. MOTOROLA Figure 6-5. Loop Instructions Figure 6-6. Move Instructions DSP96002 USER’S MANUAL 6 - 5...

  • Page 82

    INSTRUCTION FORMAT Because of the multiple bus structure and the parallelism of the DSP96002, up to 3 data transfers may be specified in the instruction word - one on the X Data Bus, one on the Y Data Bus and one within the Data ALU.

  • Page 83

    The DSP96002 instructions consist of one or two 32-bit words - an operation word and an optional effective address extension word. The instruction and its length are specified by the first word of the instruction. The general format of the operation word is shown in Figure 6-8.

  • Page 84

    The address space qualifiers X:, Y: and L: indicate which address space is being referenced. The DSP96002 offers parallel processing of the Data ALU, Address Generation Unit and Program Control- ler. For the instruction word above, the DSP96002 will perform the designated floating-point multiplier op-...

  • Page 85

    PDB and GDB) are available for internal memory core (as opposed to DMA) accesses during one instruc- tion cycle. The DSP96002 has two external expansion ports (Port A and Port B), that function as extensions of the internal address and data buses for external memory accesses. If all memory sources are internal to the DSP96002, one or more of the three memory sources may be accessed in one instruction cycle (i.e., pro-...

  • Page 86

    6 - 10 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 87

    DMA Controller. EXPANSION PORTS CONTROL The DSP96002 has two external expansion ports (Port A and Port B). Each port has a bus control register where memory wait states may be specified, parameter and control bits for a page circuit dedicated to DRAM/VRAM memory support are located, and control bits for direct software control of L pins are found.

  • Page 88

    Wait Control ** – reserved, read as zero, should be written with zero for future compatibility. Figure 7-1. DSP96002 Bus Control Registers (BCRA and BCRB) 7.2.1.1 BCRx Wait Control Fields (Bits 0-15) The BCRx Wait Control fields specify the number of wait states to be inserted in the bus cycle for an external X memory, Y memory, program memory or I/O access.

  • Page 89

    — T – T Pin Activity for Y Space Deasserted Active MOTOROLA — – T will be asserted. If YE is cleared, the DSP96002 USER’S MANUAL — – T will be deasserted. If — – T will be asserted. If PE is —...

  • Page 90

    7.2.1.10 BCRx Bus State (BS) Bit 29 The read-only Bus State status bit BS is set if the DSP96002 is currently the bus master. If the DSP96002 is not the bus master, BS is cleared. Cleared by hardware reset.

  • Page 91

    DSP96002 USER’S MANUAL serial reg. size depends on system depends on system depends on system depends on system depends on system depends on system —...

  • Page 92

    T is deasserted if the current address A is not the increment (+1) of the — – T is deasserted if the current bus cycle accesses a dif- — – T remains deasserted. If all three memory space enables DSP96002 USER’S MANUAL — – T. The bus mastership fault is Y, S1:S0 MOTOROLA...

  • Page 93

    P X,X P,P Y,Y P P X,X P,X Y,Y X,P Y,Y P — DATA PROGRAM — – T pin is controlled by comparison of the — – T remains deasserted for all external bus cycles, DSP96002 USER’S MANUAL — 7 - 7...

  • Page 94

    – — — 7.2.2.3 Since DRAM/VRAM devices are dynamic, there are maximum limits on the time which must be observed. To effectively use the fast access modes with the DSP96002, the external — — state machine must keep — —...

  • Page 95

    This fre- quency is typically about 20 kHz (50 sec refresh period). The DSP96002 does not provide any internal sup- port for SC timeouts. The external state machine is responsible for ensuring that SC timeouts do not occur.

  • Page 96

    Note: X and Y Data Memories lowest external address determined by DE bit in the OMR register. P Memory lowest external address determined by MA, MB and MC bits in the OMR register. Figure 7-6. DSP96002 Port Select Register (PSR) 7.3.1.1...

  • Page 97

    The HI supports operation in a multiprocessor environment with a set of "host functions". The external de- vice invoking these features is called the "host processor" and may be another DSP96002 processor or a 32-bit microprocessor such as the 68020, 68030, 68040 or 88000. Host processors with 32, 24 or 16-bit data buses may access all status and control bits of the HI.

  • Page 98

    7.4.3 HI Operation During Stop The host processor is able to read/write the HI registers when the DSP96002 is in the Stop state (see Sec- tion 8). If the clock is stopped in the middle of a host processor access, the flag setup and data transfer across the HI will be frozen.

  • Page 99

    — – R is used and the host processor reads RX or writes TX when the DSP96002 is in the Stop state, — – then R will only be deasserted after exiting the Stop state. . Register Register HW/SW Name...

  • Page 100

    7.4.4 HI Programming Model The HI block diagram is shown in Figure 7-9. The HI has two programming models - one for the DSP96002 programmer and one for the external host processor programmer. In most cases, the notation used reflects the DSP96002 perspective.

  • Page 101

    Figure 7-9. HI Block Diagram (One Port) MOTOROLA DSP96002 USER’S MANUAL 7 - 15...

  • Page 102

    7.4.6 Host Transmit Data Register and HMRC Clear (HTXC) - DSP96002 Side The Host Transmit register and HMRC Clear (HTXC) is used for DSP96002 to host processor data trans- fers in conjunction with "TX register write (address) and X/Y/P Memory Read (data) Interrupt" host func- tions.

  • Page 103

    HRDF bits are cleared. This transfer operation sets TXDE and HRDF. The HRX register contains valid data when the HRDF bit is set. Reading HRX clears HRDF. The DSP96002 may program the HRIE bit to cause a Host Receive Data interrupt when HRDF is set.

  • Page 104

    7.4.8 Host Control Register (HCR) - DSP96002 Side The Host Control Register (HCR) is a 32-bit read/write control register used by the DSP96002 to control the HI interrupts and flags. HCR cannot be accessed by the host processor. HCR is a read/write register to allow the use of bit manipulation instructions on control register bits.

  • Page 105

    The Host Flag 2 (HF2) bit is used as a general purpose flag for DSP96002 to host processor communica- tion. HF2 may be set or cleared by the DSP96002. HF2 Status can be read in the ICS register by the host processor.

  • Page 106

    Host Y Memory Read Command Pending (HYRP) status bit in the Host Status Register (HSR) is set. When HYRE is cleared, HYRP interrupts are disabled. When HYRE is set, the Host Y Memory Read inter- 7 - 20 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 107

    The Host Transmit Data Empty (HTDE) bit indicates that the Host Transmit Data register (HTX) is empty and can be written by the DSP96002. HTDE is set when the HTX register is transferred to the RX register. HTDE is cleared when the Transmit Data register HTX is written by the DSP96002. HTDE is set by INIT (RREQ=1), HOST reset, and HW/SW reset.

  • Page 108

    "TX register write and P Memory Read interrupt". HPRP is set when data is transferred from the TX register to the HRX register. HPRP is cleared when the HTXC register is written by the DSP96002. HPRP is cleared by INIT (TREQ=1), HOST reset, and HW/SW reset.

  • Page 109

    HYRP is set when data is transferred from the TX register to the HRX register. HYRP is cleared when the HTXC register is written by the DSP96002. HYRP is cleared by INIT (TREQ=1), HOST reset, and HW/SW reset. 7.4.9.13 HSR Host Y Memory Write Command Pending (HYWP) Bit 13 The Host Y Memory Write Command Pending (HYWP) bit indicates that the HRX and TX registers contain data from the host processor written by the host processor via the host function "TX register write and Y...

  • Page 110

    DSP96002. The HV is set to a predefined value for each port by HW/SW reset (see Figure 7-7). If HC is set, the host processor should not change HV.

  • Page 111

    The read-only Transmitter Ready (TRDY) status bit indicates that both the Transmit Register TX (on the host processor side) and Host Receive Data Register HRX (on the DSP96002 side) are empty. TRDY may be used to assert the Host Request TRDY provides valid status regardless of whether the TRDY interrupt is enabled or not so that polling tech- niques may be used by the host processor.

  • Page 112

    7 - 26 — – R pin when the Transmitter Ready (TRDY) — – R pin. TYEQ is cleared by HW/SW reset. +Th minimum no accesses DSP96002 USER’S MANUAL — — – R pin. TREQ is cleared first access MOTOROLA...

  • Page 113

    RX register or HTX register is full, the TX register or HRX register is empty, • both the TX register (on the host processor side) and the HRX register (on the DSP96002 side) • are empty. In DMA Mode (DMAE=1): When the HREQ status bit is cleared, it indicates that the are being requested.

  • Page 114

    ICS Host Flag 0 (HF0) Bit 8 The Host Flag 0 (HF0) bit is used as a general purpose flag for host processor to DSP96002 communica- tion. HF0 may be set or cleared by the host processor. HF0 is cleared by HW/SW reset. The status of HF0 can be read in the HSR, bit 3.

  • Page 115

    X/Y/P Memory Read Interrupt". HMRC is cleared when the HTX register contents which were written, in the DSP96002 side, thorough the HTXC address, are transferred to the RX register in the host processor side. HMRC is cleared by INIT (TREQ=1), HOST reset, and HW/SW reset.

  • Page 116

    MC88000, CAS in the MC680x0, or BSET in the DSP96002) and examine which host processor has allo- cated the HI or set the semaphore bit by "bit test and set" instructions. The BSET in the DSP96002 is "un- interruptable" in that it tests the semaphore bit and indicates the results in the status register and then sets the semaphore bit without relinquishing the bus.

  • Page 117

    HI and read by the host processor. The host processor is able to read these status bits without regard to the clock rate used by the DSP96002, but there is a chance that the state of the bit could be chang- ing during the read operation.

  • Page 118

    Reading Status Bits HF1, HF0, HCP, HPRP, HPWP, HXRP, HXWP, HYRP, HYWP, HTDE, and HRDF status bits are set or cleared by the host processor side of the HI. These bits are individually synchronized to the DSP96002 clock. The only system problem with reading status is HF1 and HF0 if they are encoded as a pair, e.g. the four combinations 00, 01, 10, and 11 each have significance.

  • Page 119

    This example outlines the steps that a DSP96002 bus master, behaving as host processor, transfers data from a DSP96002 bus slave, thorough the slave’s HI. The on-chip DMA Controllers of both DSP96002 pro- cessors are used to transfer data without interfering with the local processing in both chips. Figure 7-18 con- tains a diagram showing the data paths and control lines used for the data transfers.

  • Page 120

    This example outlines the steps that an external DMA Controller, the bus master, takes to transfer data to a DSP96002 bus slave, thorough the slave’s HI. The on-chip DMA Controller of the DSP96002 is used to locally transfer data between the HI and the DSP96002 memory without interfering with core processing.

  • Page 121

    This example outlines the steps that an external DMA Controller, the bus master, takes to transfer data from a DSP96002 bus slave, thorough the slave’s HI. The on-chip DMA Controller of the DSP96002 is used to locally transfer data between the HI and the DSP96002 memory without interfering with core processing.

  • Page 122

    — Read Bus Cycle into Memory Figure 7-20. DSP96002 to External DMA Data Read A data read transfer is initiated when the slave’s is full and the data is ready to be read by the external DMA Controller. pin in the master which is a DMA service request input. When troller transfers the data word from the RX register in the slave’s HI to a memory location.

  • Page 123

    (HC bit is cleared). The master executes the following instructions: HCMD BRSET MOVE MOTOROLA words #0,Y:SEMR SEMA #0,Y:SEMR Y:HCVR,R0 15,Y:HCVR,HCMD R0,Y:HCVR DSP96002 USER’S MANUAL clock cycles — – ;testing of HC 7 - 37 S=0,...

  • Page 124

    A=1, A5-A2=1100). The master executes the following instruction: MOVE 7 - 38 — – — – S=0, A=1, A5-A2=1000). The master executes the follow- Y:HICSR,R0 — – — – S=0, A=1, A5-A2=1000). The master executes the follow- R0,Y:HICSR Y:HIVR,R0 DSP96002 USER’S MANUAL — – S=0, MOTOROLA...

  • Page 125

    The X/Y/P Memory Write procedure enables the host processor to write a data word D into an arbitrary ad- dress A located in the DSP96002 memory space. The host processor must execute the following steps: Verify that TX is empty (TXDE=1).

  • Page 126

    HRX to get the address A, stores A in an address pointer Rn, and then again reads HRX to retrieve the data D and store D into the DSP96002 memory location pointed by Rn. The host processor may test TRDY to see if both A and D were removed from the input double buffer (TX/HRX).

  • Page 127

    The X/Y/P Memory Read procedure enables the host processor to read a data word D from an arbitrary address A located in the DSP96002 memory space. The host processor must execute the following steps: Verify that TX is empty (TXDE=1).

  • Page 128

    1.Write contents of Host HRX Register to AGU MOVEP X:HRX,Rn 2.Read contents of X Memory Address to Host HTXC reg: MOVEP X:(Rn),X:HTXC 3.HTX - words #TXDE,X:(R4),_LOOP1 R1,X:(R3) #HMRC,X:(R4),_LOOP2 X:(R2),D0.S DSP96002 USER’S MANUAL HMRC=1 in ICS Register: RX and HMRC=0 clock cycles MOTOROLA...

  • Page 129

    The Direct Memory Access (DMA) Controller is an on-chip device that permits data transfers between any two locations in any combination of memory spaces, without intervention of the DSP96002 core. Due to ded- icated DMA buses and dual-access internal memories, a high level of isolation is achieved where the DMA operation does not interfere or slow down the core operation.

  • Page 130

    Int. mem (same memory space) Int. mem (different memory space) Int. mem (same memory space) Ext. mem Int. I/O (different memory space) Int. I/O (same memory space) Int. I/O (different memory space) Int. I/O (same memory space) Int. I/O DSP96002 USER’S MANUAL Notes MOTOROLA...

  • Page 131

    DMA Destination Modifier Register DDM0 addr X:$FFFFFFDB DMA Destination Address Register DDR0 addr X:$FFFFFFDA DMA Destination Offset Register DDN0 addr X:$FFFFFFD9 DMA Counter DCO0 addr X:$FFFFFFDC DMA Control/Status Register DCS0 DTM1 DTM0 DMAP addr X:$FFFFFFD8 DSP96002 USER’S MANUAL 7 - 45...

  • Page 132

    X:$FFFFFFD5 DMA Destination Modifier Register DDM1 addr X:$FFFFFFD3 DMA Destination Address Register DDR1 addr X:$FFFFFFD2 DMA Destination Offset Register DDN1 addr X:$FFFFFFD1 DMA Counter DCO1 addr X:$FFFFFFD4 DMA Control/Status Register DTM1 DTM0 DMAP addr X:$FFFFFFD0 DSP96002 USER’S MANUAL DCS1 MOTOROLA...

  • Page 133

    AND outputs are ORed together. The OR output goes to the edge-triggered latch whose output initiates MOTOROLA – — — – – — — – B and C pins. The external inputs behave as edge- DSP96002 USER’S MANUAL 7 - 47...

  • Page 134

    B pin) External ( – I — R — Q – C pin) Port A Host Receive Data (HRDF=1) Port A Host Transmit Data (HTXE=1) Port B Host Receive Data (HRDF=1) Port B Host Transmit Data (HTXE=1) DSP96002 USER’S MANUAL MOTOROLA...

  • Page 135

    DMA transfer if DTM1-DTM0=00. Setting DE will enable transfers in DMA modes that use a request- ing device as trigger. DE is cleared by Hardware and Software Reset, and by end of DMA transfer if a Single MOTOROLA DSP96002 USER’S MANUAL 7 - 49...

  • Page 136

    DMA ALU is hardwired in the (R)+N configuration. Users can increment or decrement by 1 or N by loading the DMA Offset registers accordingly. For example, DMA block transfers with DSP96002 word addressable memory would often load the DMA Offset register with +1. However, interpolation, decimation, and commu- tation operations could require an arbitrary address offset value N.

  • Page 137

    The DMA has a separate wait mechanism, and in this case the core continues normal execution since the core clock does not enter wait states. MOTOROLA DSP96002 USER’S MANUAL 7 - 51...

  • Page 138

    Internal I/O peripherals occupy the top 128 locations in X memory space. External I/O peripherals occupy the top 128 locations in Y memory space. Figure 7-27 shows the I/O memory map for the internal I/O pe- ripherals. 7 - 52 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 139

    Figure 7-27. Internal I/O Memory Map MOTOROLA X DATA Memory Space - Port Select Register RESERVED - HOSTA HTX Reg. and HMRC Clear RESERVED - HOSTB HTX Reg. and HMRC Clear RESERVED RESERVED RESERVED RESERVED RESERVED DSP96002 USER’S MANUAL 7 - 53...

  • Page 140

    7 - 54 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 141

    Also, the interrupt priority level (IPL) of the processor and interrupt sources is described. PROCESSING STATES The DSP96002 is always in one of five processing states: normal, exception, reset, wait, or stop. The nor- mal processing state is that associated with instruction execution.

  • Page 142

    EXCEPTION PROCESSING Exception processing in a digital signal processing environment is primarily associated with transfer of data between DSP96002 memory or registers and a peripheral device. When an interrupt occurs, a limited con- text switch must be performed with minimum overhead.

  • Page 143

    This address is used for the next instruction fetch, instead of the PC, and the interrupt instruction fetch address+1 is used for the subsequent instruction fetch. While the MOTOROLA DSP96002 USER’S MANUAL 8 - 3...

  • Page 144

    The PC is never updated during a fast interrupt routine. Normal instruction fetching resumes using the PC following the completion of the fast interrupt routine. Figure 8-3 illustrates the effect of a fast interrupt routine on the instruction pipeline. 8 - 4 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 145

    During execution of the jump to subroutine instruction, when it occurs in the first or second interrupt vector location, the following actions occur: 1. The PC and SR are stacked. MOTOROLA Figure 8-3. DSP96002 USER’S MANUAL 8 - 5...

  • Page 146

    When LC finally reaches one, the fetches are reinitiated and the interrupt can be serviced. In Figure 8-5 it can be seen that n5 (loaded into the instruction latch from the backup instruction latch) is decoded and executed as well as n6 before the first interrupt vector. 8 - 6 JSRf JSRf DSP96002 USER’S MANUAL MOTOROLA...

  • Page 147

    Example Of Interrupt Service When Interrupt Is Presented To REP Instruction INTERRUPT SOURCES Exceptions may originate from a number of interrupt sources. The DSP96002 interrupt sources are given in Figure 8-6. The corresponding interrupt starting addresses for each interrupt source are shown. Inter- rupt starting addresses are internally-generated 32-bit addresses which point to the starting address of the fast interrupt service routine.

  • Page 148

    $00000034 $00000036 $00000038 $0000003A $0000003C $0000003E $00000040 $000000FE $00000100 $000001FE Note: User interrupt vector locations are available Figure 8-6. DSP96002 Interrupt Sources 8 - 8 interrupt Source Hardware RESET Hardware RESET Stack Error Illegal Instruction (F)TRAPcc (default) IRQA IRQB IRQC...

  • Page 149

    On all level-sensitive interrupts, the Interrupt must be externally released before interrupts are internally re-enabled or the processor will be interrupted repeatedly until the interrupt is released. MOTOROLA the first vector location, is considered n3 trap CAUTION DSP96002 USER’S MANUAL case of an edge-sensi- 8 - 9...

  • Page 150

    Note: Reserved bits read as zero and should be written with zero for future compatibility. Figure 8-9. Interrupt Priority Register IPR (Address X:$FFFFFFFF) 8 - 10 IRCS ICL2 ICL1 ICL0 DSP96002 USER’S MANUAL Exceptions Masked None IPL 0 IPL 0,1...

  • Page 151

    (IPL 0, 1, or 2). Interrupt priority levels are set by writing to the Interrupt Priority Register. MOTOROLA Enabled Int. Priority Level (IPL) IRxS level neg. edge DSP96002 USER’S MANUAL Status Serviced Pending 8 - 11...

  • Page 152

    IRQB Interrupt Priority Level - IBL1-IBL0 (Bits 4-5) The IRQB Interrupt Priority Level (IBL1-IBL0) bits are used to enable and specify the priority level of the external interrupt input IRQB. 8 - 12 Int. Priority Level (IPL) High DSP96002 USER’S MANUAL MOTOROLA...

  • Page 153

    8.5.2.8 IRQC Trigger Mode - ICL2 (Bit 10) The IRQC Trigger Mode (ICL2) bit specifies the trigger method for the external interrupt input IRQC. MOTOROLA Int. Priority Level (IPL) High Int. Priority Level (IPL) DSP96002 USER’S MANUAL 8 - 13...

  • Page 154

    The Host A Interrupt Priority Level (HAL1-HAL0) bits are used to enable and specify the priority level of all interrupt sources located in the Port A Host Interface. 8 - 14 High Int. Priority Level (IPL) Int. Priority Level (IPL) DSP96002 USER’S MANUAL MOTOROLA...

  • Page 155

    The Host B Interrupt Priority Level (HBL1-HBL0) bits are used to enable and specify the priority level of all interrupt sources located in the Port B Host Interface. HBL1 HBL0 Enabled MOTOROLA Int. Priority Level (IPL) Int. Priority Level (IPL) DSP96002 USER’S MANUAL 8 - 15...

  • Page 156

    Host B Write P Memory Interrupt Host B Transmit Data Interrupt DMA Channel 0 Interrupt lowest DMA Channel 1 Interrupt Figure 8-12. DSP96002 Exception Priorities within an IPL 8 - 16 DSP96002 USER’S MANUAL Enabled by (IPR) IAL1-IAL0 (IPR) IBL1-IBL0...

  • Page 157

    The MODA, MODB, and MODC pins are used to load MA, MB and MC with the initial operating mode of the DSP96002. These pins are sampled as the DSP96002 leaves the RESET state. These pins do not affect the operating mode after that time and are available for other functions. Chip operating modes are programmable by writing the operating mode bits MA, MB and MC in the operating mode register.

  • Page 158

    The bootstrap modes load the internal program memory from an external source. The type and location of the source is selected according to the values of the MA and MB bits in the OMR. After loading the internal program memory, the DSP96002 begins program execution at the address located at the on-chip program memory address $00000000.

  • Page 159

    The user may also select a bootstrap mode by writing into the OMR. This technique allows the DSP96002 programmer to re-boot his system. From any operating mode, the user may program the OMR to the required bootstrap mode. This begins a timed delay to map the bootstrap ROM into the program address space.

  • Page 160

    ; Host algorithm / AND / external bus method. ; This is the Bootstrap program contained in the DSP96002. This program ; can load the internal program memory from one of 4 external sources. ; The program reads the OMR bits MA and MB to decide which external ;...

  • Page 161

    ; Boot thru Host Interface in Port B _HOSTB BCLR MOVE MOVE Figure 9-3. Assembler Source for DSP96002 Bootstrap Program (2 of 3) MOTOROLA #1024,_LOOP1 ; Load 1,024 instruction words #1,OMR,_HOSTLD ; Perform load from Host ; Interface if MB=1.

  • Page 162

    _BOOTEND ANDI ANDI ; DSP96002 bootstrap program size = 50 words Figure 9-3. Assembler Source for DSP96002 Bootstrap Program (3 of 3) DATA MEMORY MAPS The data memory maps are shown in Figure 9-4 and Figure 9-5. 9 - 6 #3,X:(R2),_LBL22 ;...

  • Page 163

    X DATA $FFFFFFFF On-Chip Peripherals $FFFFFF80 External X Data Memory $000001FF Internal X Data RAM $00000000 Figure 9-4. DSP96002 Data Memory Maps for DE=0 MOTOROLA Y DATA $FFFFFFFF External Peripherals $FFFFFF80 External Y Data Memory $000001FF Internal Y Data RAM $00000000 DSP96002 USER’S MANUAL...

  • Page 164

    X Data Memory $000007FF Internal X Data $000003FF Internal Reserved $000001FF Internal X Data RAM $00000000 Figure 9-5. DSP96002 Data Memory Maps for DE=1 9 - 8 Y DATA $FFFFFFFF External Peripherals $FFFFFF80 External Y Data Memory $000007FF Internal Y Data...

  • Page 165

    5 or 7), and program execution begins at location $00000000 in internal PRAM. INTERNAL X AND Y DATA SPACE $00000000-$000001FF $00000000-$000007FF Note: Internal X I/O space is located in the range $FFFFFF80-$FFFFFFFF. Figure 9-6. DSP96002 Memory Maps - Summary MOTOROLA PROGRAM MEMORY EXTERNAL PROGRAM SPACE $00000400-$FFFFFFFF $00000400-$FFFFFFFF none...

  • Page 166

    9 - 10 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 167

    A key feature of the OnCE dedicated pins is to allow the user to insert the DSP96002 into his target system yet retaining debug control. The need for a costly cable which brings out the DSP96002 footprint on an em-...

  • Page 168

    SCK frequency is one third of the system clock frequency. 10 - 2 through the DSCK/OS1 pin when it is an input. The serial clock Status Normal state STOP or WAIT state Core busy state Core or DMA busy state DSP96002 USER’S MANUAL MOTOROLA...

  • Page 169

    DSO line will be asserted (negative true logic) for two T cycles (2T = period of DSP96002 master clock) to indicate that the serial shift registers are ready to receive clocks in order to deliver the data. When a trace or breakpoint occurs this line will be asserted for one T cycle to indicate (acknowledge) that the chip has entered the debug mode and is waiting for commands.

  • Page 170

    (MOVEM or MOVEP) or DMA program memory access- es. These bits are cleared on hardware reset. 10 - 4 Controller and Serial Interface Selection Breakpoint disabled Breakpoint on write accesses Breakpoint on read accesses Breakpoint on both read and write accesses DSP96002 USER’S MANUAL registers. MOTOROLA...

  • Page 171

    Breakpoint on both read and write accesses DBS0 Selection Breakpoint on X Core fetch addresses Breakpoint on Y Core fetch addresses Breakpoint on X DMA Breakpoint on Y DMA DSP96002 USER’S MANUAL PBS1 PBS0 PBE1 PBE0 accesses fetch addresses fetch addresses 10 - 5...

  • Page 172

    Address comparators are useful in determining where a program may be getting lost or when data is being written to areas that should not be written to in real-time. They are also useful in halting a program at a spe- 10 - 6 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 173

    Conditional jump addresses produced by the instruction pipeline that are within a program address block being monitored are only valid if the conditional jump instruction occurs, otherwise the conditional jump ad- MOTOROLA DSP96002 USER’S MANUAL 10 - 7...

  • Page 174

    The breakpoint counter is useful for stopping at the nth iteration of a program loop or when the nth occur- rence of a data memory access occurs. This information significantly decreases algorithm debug time and 10 - 8 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 175

    Program hot spots may be statistically evaluated by setting the breakpoint counter to a value, setting a pro- gram address in the program address comparator registers, passing control of the DSP96002 back to the user program and checking to see if a breakpoint occurs after n iterations of the program memory access.

  • Page 176

    Program Memory Breakpoint Counter logic. 10.5 TRACE/STEP MODE To execute DSP96002 instructions in single or multiple steps, a special mode similar to the trace mode of operation on the DSP56001 is necessary. The DSP96002 does not cause an interrupt exception as is the case with the DSP56001 but enters the debug mode of operation instead and waits for further instructions from the debug serial port after each instruction or group of instructions.

  • Page 177

    To enable the trace mode of operation the counter is loaded with a value, the program counter is set to the start location of the instruction(s) to be executed real-time, the trace mode is selected in the OSCR and the DSP96002 exits the debug mode by executing the appropriate command issued by the external command controller.

  • Page 178

    STOP state and enter the Debug Mode. After receiving the acknowledge, the command con- — – troller must negate R . Note that in this case, the chip completes the execution of the STOP instruction and halts after the next instruction enters the instruction latch. 10 - 12 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 179

    The PDB Register is a 32-bit latch that stores the value of the Program Data Bus generated by the last Pro- gram Memory access of the core before the Debug Mode is entered. OPDBR can only be read or written MOTOROLA DSP96002 USER’S MANUAL 10 - 13...

  • Page 180

    Instruction Latch. Figure 10-7. Pipeline Information Registers 10 - 14 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 181

    Figure 10-8. Program Address Bus FIFO MOTOROLA DSP96002 USER’S MANUAL 10 - 15...

  • Page 182

    10.10 SERIAL PROTOCOL DESCRIPTION In order to permit an efficient means of communication between the command controller and the DSP96002 chip, the following protocol is adopted. Before starting any debugging activity the command controller has to wait for an acknowledge that the chip has entered the Debug Mode.

  • Page 183

    10.10.1.3 Go Command (GO) Bit 6 If GO is set, execute instruction. Action inactive (no action taken) execute instruction 10.10.1.4 Read/Write Command (R/W) Bit 7 Action MOTOROLA RS4 RS3 RS2 RS1 RS0 Command Format DSP96002 USER’S MANUAL 10 - 17...

  • Page 184

    The command controller acts as the medium between the DSP96002 target system and a host computer. The host computer interfaces to the controller using a standard RS232 three wire cable or the DSP96002 Application Development System parallel bus. A jumper option on the command controller board selects which method of communications will be used.

  • Page 185

    "halt" state and the contents of R0 are loaded in the GDB REGISTER. The signal that marks the end of the instruction returns the chip to the "halt" state and an acknowledge is is- sued to the command controller.) MOTOROLA DSP96002 USER’S MANUAL 10 - 19...

  • Page 186

    Send command READ GDB REGISTER (ODEC selects GDB as source for serial data and an acknowledge is issued to the command controller.) Send command NO SELECTION and GO (no EX). 10 - 20 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 187

    PIL (instruction latch) value. (After all the 32-bits have been received the PDB register drives the PDB. ODEC causes the core to load the opcode. An acknowledge is issued to the command controller.) MOTOROLA DSP96002 USER’S MANUAL 10 - 21...

  • Page 188

    "halt" state and the Debug Mode bit in OSCR is cleared. The chip executes first the jump instruction and will then fetch the instruction from the target address. The chip con- tinues to execute instructions from that address until a Debug Mode condition occurs.) 10 - 22 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 189

    INSTRUCTION SET DETAILS INTRODUCTION This appendix contains detailed information about each instruction defined in the DSP96002 instruction set. They are arranged in alphabetical order. ADDRESSING MODES Addressing modes are categorized by the ways in which they may be used. The following classifications will be used in the instruction definitions.

  • Page 190

    PC Relative – – – – – Special – – – – – – – – – – DSP96002 USER’S MANUAL Addressing Categories Assembler Syntax Note 1 (Rn) (Rn)+ (Rn)- (Rn)+Nn (Rn)- Nn (Rn+Nn) -(Rn) (Rn+displacement) (PC+displacement) (PC+xx) (PC+Rn) #Data...

  • Page 191

    Multiple Wrap-Around Modulo 2 Multiple Wrap-Around Modulo 4 Multiple Wrap-Around Modulo 8 Multiple Wrap-Around Modulo 2**22 Multiple Wrap-Around Modulo 2**23 Linear (Modulo 2**32) Figure A-2. Address Modifier Summary DSP96002 USER’S MANUAL ((2**24)-1) (2**24) A - 3...

  • Page 192

    Possible Combinations of the N, Z, I and NAN Bits for Floating-Point Results A - 4 – R bit is cleared during processor reset. See the example for Result Data Type +Normalized/Denormalized - Normalized/Denormalized +Infinity -Infinity +NaN Figure A-3. DSP96002 USER’S MANUAL MOTOROLA...

  • Page 193

    – – – – – – – – – – – – – DSP96002 USER’S MANUAL Special Definitions Note 1 Note 2 Note 3,4 Note 3 Note 29 Note 30 Note 15,24 Note 31 Note 5 Note 32,33 Note 23,32,34...

  • Page 194

    – – – – – – – – – – – – – DSP96002 USER’S MANUAL Special Definitions Note 21 Note 9,10,11 Note 9,10,11 Note 9,10,11 Note 9,10,11 Note 12,13,14 Note 12,13,14 Note 16 Note 21 Note 16,17,24 Note 16,17,24...

  • Page 195

    – – – – – – – – – – – – – DSP96002 USER’S MANUAL Special Definitions Note 28 Note 28 Note 3 Note 3 Note 28 Note 28 Note 28 Note 28 Note 28 Note 6,7,8,22 Note 18...

  • Page 196

    Note 26 C - Set if the last bit shifted out of the operand is set. Cleared otherwise. Note 27 I - Set if any one of the source operands is infinity. Cleared otherwise. A - 8 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 197

    Cleared otherwise. The INX bit is not affected by fixed point operations. The INX bit is cleared during processor reset. MOTOROLA DSP96002 USER’S MANUAL – R, LR, I, N, Z, V or C is selected, –...

  • Page 198

    IEEE 754-1985 standard environment, a special bit, the unordered condition code (UNCC) bit, was created in the DSP96002. This bit can be used when porting the software to ensure that the intended branch is taken, or an exception is generated, when the ported pro- gram processes a NaN.

  • Page 199

    The UNCC bit has been provided on the DSP96002 to aid in porting programs written in an IEEE non-aware environment to the DSP96002 (IEEE aware environment). FBERR instructions which branch on UNCC set can be inserted in branches which could have been incorrectly taken due to NaN operands being in- volved in the FCMP.

  • Page 200

    – – – – – – – – – – – – – – – – – – DSP96002 USER’S MANUAL Special Definitions – – – – – – – – – – Note 9 – – – – –...

  • Page 201

    – – – – – – – – – – – – – – – DSP96002 USER’S MANUAL Special Definitions – – – – Note 26 Note 27 – – – – Notes 1,7,19,22,23,24 Notes 1,7,19,22,23,24 Notes 1,7,21,22,23,24 Notes 1,7,21,22,23,24...

  • Page 202

    – – – – – – – – – – – – – – DSP96002 USER’S MANUAL Special Definitions Note 16 Note 16 Note 16 Note 16 Note 16 Note 16 Note 16 Note 10 Note 11 Note 11 MOTOROLA...

  • Page 203

    OPERR - Set if the operands are like-signed infinities. Cleared otherwise. Note 29 NAN - Set if the source operand is a NaN. Cleared otherwise. Note 30 OPERR - Set if the source operand is infinity, zero or NaN. Cleared otherwise. MOTOROLA DSP96002 USER’S MANUAL A - 15...

  • Page 204

    (IEEE Invalid Operation) - signaled if an operand is invalid for the operation to be performed. SIOP = SIOP v (UNCC v SNAN v OPERR) NOTATION Symbols are used to abbreviate operands and operations in each instruction description. Figure A-6 lists the symbols used and their respective meanings. A - 16 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 205

    X memory reference (32 bits) Y memory reference (32 bits) Long memory reference - X concatenated with Y (64 bits) Program memory reference (32 bits) Figure A-6. Instruction Description Notation MOTOROLA Operands part of Dn) DSP96002 USER’S MANUAL A - 17...

  • Page 206

    “(parallel data bus move)” in the Operation portion of the description. Detailed information on each parallel move operation is given in the MOVE instruction description. A - 18 Operators DSP96002 USER’S MANUAL MOTOROLA...

  • Page 207

    Memory: 1 + mv program words MOTOROLA Absolute Value Assembler Syntax: (move syntax - see the MOVE instruction de- scription. ) (move syntax - see the MOVE instruction description. ) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0100 uu11 1ddd A - 19...

  • Page 208

    Memory: 1 + mv program words A - 20 Assembler Syntax: (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL (move syntax - see the MOVE in- struction description.) 1sss uu11 1ddd MOTOROLA...

  • Page 209

    Add with Carry Assembler Syntax: ADDC (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL ADDC (move syntax - see the MOVE in- struction description.) 1sss uu01 1ddd...

  • Page 210

    A - 22 Logical AND Assembler Syntax: (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL (move syntax - see the MOVE instruc- tion description.) 0sss uu00 1ddd MOTOROLA...

  • Page 211

    OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA MOTOROLA Assembler Syntax: ANDC (move syntax - see the MOVE instruc- (move syntax - see the MOVE instruction description.) 14 13 DSP96002 USER’S MANUAL ANDC tion description.) 0sss 1000 1ddd A - 23...

  • Page 212

    Dn.L n n n s s s Dn.L n n n Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words A - 24 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 213

    - Cleared if bit 6 of the immediate operand is cleared. Not affected otherwise. UNCC - Cleared if bit 7 of the immediate operand is cleared. Not affected otherwise. MOTOROLA Assembler Syntax: AND(I) #Byte,D DSP96002 USER’S MANUAL ANDI A - 25...

  • Page 214

    0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 Timing: 2 oscillator clock cycles Memory: 1 program words A - 26 14 13 i i i i DSP96002 USER’S MANUAL 00ff 0111 10EE MOTOROLA...

  • Page 215

    - Set if result is negative. Cleared otherwise. - Not affected. - Not affected. – - Not affected. - Not affected. ER Status Bits: Not affected. IER Flags: Not affected. MOTOROLA DSP96002 USER’S MANUAL (parallel data bus move) A - 27...

  • Page 216

    Memory: 1 + mv program words (1 program word for ASL #shift) A - 28 14 13 14 13 14 13 0000 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0101 uu01 1ddd 0sss 0011 0ddd 001n...

  • Page 217

    - Set if result is negative. Cleared otherwise. - Not affected. - Not affected. – - Not affected. - Not affected. ER Status Bits: Not affected. IER Flags: Not affected. MOTOROLA (parallel data bus move) DSP96002 USER’S MANUAL A - 29...

  • Page 218

    Memory: 1 + mv program words (1 program word for ASR #shift) A - 30 14 13 14 13 14 13 0000 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0000 uu11 1ddd 0sss 0011 1ddd 000n...

  • Page 219

    Z v C = 0 Z v (N && V) = 1 Z v C = 1 N && V = 1 N = 1 Z = 0 N = 0 V = 0 V = 1 DSP96002 USER’S MANUAL A - 31...

  • Page 220

    1 1 0 0 1 CS(LO) 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 DSP96002 USER’S MANUAL cccc 0aaa aaaa cccc 0000 0000...

  • Page 221

    - Changed if bit 7 is specified. Not affected otherwise. MOTOROLA Assembler Syntax: BCHG #bit,X: ea BCHG #bit,X: aa BCHG #bit,X: pp BCHG #bit,Y: ea BCHG #bit,Y: aa BCHG #bit,Y: pp BCHG #bit,D DSP96002 USER’S MANUAL BCHG A - 33...

  • Page 222

    SUNF - Changed if bit 18 is specified. Not affected otherwise. SOVF - Changed if bit 19 is specified. Not affected otherwise. SIOP - Changed if bit 20 is specified. Not affected otherwise. A - 34 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 223

    #bit,Y: aa 14 13 0aaa #bit,X: ea #bit,Y: ea 14 13 MMMR Bit Number b b b b b Bit 0-31 n n n n n DSP96002 USER’S MANUAL 0100 000b bbbb 010S 000b bbbb 010S 000b bbbb 010S 000b...

  • Page 224

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 4 + mvb oscillator clock cycles Memory: 1 + ea program words A - 36 where nnn = 0-7 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 225

    - Cleared if bit 7 is specified. Not affected otherwise. MOTOROLA Bit Test and Clear Assembler Syntax: BCLR #bit,X: ea BCLR #bit,X: aa BCLR #bit,X: pp BCLR #bit,Y: ea BCLR #bit,Y: aa BCLR #bit,Y: pp BCLR #bit,D DSP96002 USER’S MANUAL BCLR A - 37...

  • Page 226

    SUNF - Cleared if bit 18 is specified. Not affected otherwise. SOVF - Cleared if bit 19 is specified. Not affected otherwise. SIOP - Cleared if bit 20 is specified. Not affected otherwise. A - 38 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 227

    14 13 dddd 14 13 1ppp 14 13 0aaa 14 13 MMMR Bit Number b b b b b Bit 0-31 n n n n n DSP96002 USER’S MANUAL 0100 000b bbbb 010S 000b bbbb 010S 000b bbbb 010S 000b...

  • Page 228

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 4 + mvb oscillator clock cycles Memory: 1 + ea program words A - 40 where nnn = 0-7 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 229

    Memory: 1 + mv program words MOTOROLA Find Leading One Assembler Syntax: BFIND 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL BFIND S,D (move syntax - see the MOVE in- struction description.) 0sss 0111 1ddd A - 41...

  • Page 230

    Memory: 1 + ea program words A - 42 Branch Always Assembler Syntax: label (short) label 14 13 aaaa 14 13 0000 PC RELATIVE DISPLACEMENT 14 13 001R DSP96002 USER’S MANUAL 1111 0aaa aaaa 1111 0000 0000 1111 0000 0000 MOTOROLA...

  • Page 231

    MOTOROLA Branch if Bit Clear Assembler Syntax: BRCLR #bit,X: ea, label BRCLR #bit,X: aa, label BRCLR #bit,X: pp, label BRCLR #bit,Y: ea, label BRCLR #bit,Y: aa, label BRCLR #bit,Y: pp, label BRCLR #bit,S,label DSP96002 USER’S MANUAL BRCLR A - 43...

  • Page 232

    #bit,X: ea, label #bit,Y: ea, label 14 13 MMMR PC RELATIVE DISPLACEMENT Bit Number b b b b b Bit 0-31 n n n n n where nnnnn = 0-31 DSP96002 USER’S MANUAL 0100 000b bbbb 010S 000b bbbb 010S 000b bbbb...

  • Page 233

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 8 + jx oscillator clock cycles Memory: 2 program words MOTOROLA where nnn = 0-7 DSP96002 USER’S MANUAL A - 45...

  • Page 234

    A - 46 Branch if Bit Set Assembler Syntax: BRSET #bit,X: ea, label BRSET #bit,X: aa, label BRSET #bit,X: pp, label BRSET #bit,Y: ea, label BRSET #bit,Y: aa, label BRSET #bit,Y: pp, label BRSET #bit,S,label DSP96002 USER’S MANUAL BRSET MOTOROLA...

  • Page 235

    #bit,X: ea, label #bit,X: ea, label 14 13 MMMR PC RELATIVE DISPLACEMENT Bit Number b b b b b Bit 0-31 n n n n n where nnnnn = 0-31 DSP96002 USER’S MANUAL 1100 000b bbbb 110S 000b bbbb 110S 000b bbbb...

  • Page 236

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 8 + jx oscillator clock cycles Memory: 2 program words A - 48 where nnn = 0-7 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 237

    Z v (N && V) = 1 Z v C = 1 N && V = 1 N = 1 Z = 0 N = 0 V = 0 V = 1 DSP96002 USER’S MANUAL BScc Assembler Syntax: BScc label (short) BScc label BScc...

  • Page 238

    1 1 0 0 1 CS(LO) 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 DSP96002 USER’S MANUAL cccc 0aaa aaaa cccc 0000 0000...

  • Page 239

    SSL; PC + xxxx PC + 1 SSL; PC + xxxx PC + 1 SSL; PC + xxxx PC + 1 SSL; PC + xxxx PC + 1 DSP96002 USER’S MANUAL BSCLR Assembler Syntax: BSCLR #bit,X: ea, label BSCLR #bit,X: aa, label BSCLR...

  • Page 240

    #bit,X: ea, label #bit,Y: ea, label 14 13 MMMR PC RELATIVE DISPLACEMENT Bit Number b b b b b Bit 0-31 n n n n n where nnnnn = 0-31 DSP96002 USER’S MANUAL 0100 000b bbbb 010S 000b bbbb 010S 000b bbbb...

  • Page 241

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 8 + jx oscillator clock cycles Memory: 2 program words MOTOROLA where nnn = 0-7 DSP96002 USER’S MANUAL A - 53...

  • Page 242

    - Set if bit 7 is specified. Not affected otherwise. A - 54 Bit Test and Set Assembler Syntax: BSET #bit,X: ea BSET #bit,X: aa BSET #bit,X: pp BSET #bit,Y: ea BSET #bit,Y: aa BSET #bit,Y: pp BSET #bit,D DSP96002 USER’S MANUAL BSET MOTOROLA...

  • Page 243

    -Set if bit 17 is specified. Not affected otherwise. SUNF -Set if bit 18 is specified. Not affected otherwise. SOVF -Set if bit 19 is specified. Not affected otherwise. SIOP -Set if bit 20 is specified. Not affected otherwise. MOTOROLA DSP96002 USER’S MANUAL A - 55...

  • Page 244

    14 13 0aaa #bit,X: ea #bit,Y: ea 14 13 MMMR Bit Number b b b b b Bit 0-31 n n n n n where nnnnn = 0-31 DSP96002 USER’S MANUAL 1100 000b bbbb 110S 000b bbbb 110S 000b bbbb 110S...

  • Page 245

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 4 + mvb oscillator clock cycles Memory: 1 + ea program words MOTOROLA where nnn = 0-7 DSP96002 USER’S MANUAL A - 57...

  • Page 246

    0011 0100 Instruction Format: 0000 0011 0100 A - 58 Assembler Syntax: label (short) label 14 13 aaaa 14 13 001R 14 13 0000 PC RELATIVE DISPLACEMENT DSP96002 USER’S MANUAL 1111 0aaa aaaa 1111 0000 0000 1111 0000 0000 MOTOROLA...

  • Page 247

    Instruction Fields: Rn - R0-R7 Long PC Relative Displacement - 32 bits Short PC Relative Displacement - aaaaaaaaaaaaaaa (15 bits) Timing: 6 + jx oscillator clock cycles Memory: 1 + ea program words MOTOROLA DSP96002 USER’S MANUAL A - 59...

  • Page 248

    A - 60 Assembler Syntax: BSSET #bit,X: ea, label SSL; BSSET #bit,X: aa, label SSL; BSSET #bit,X: pp, label SSL; BSSET #bit,Y: ea, label SSL; BSSET #bit,Y: aa, label SSL; BSSET #bit,Y: pp, label SSL; SSL; BSSET #bit,S,label DSP96002 USER’S MANUAL MOTOROLA...

  • Page 249

    #bit,X: ea, label #bit,Y: ea, label 14 13 MMMR PC RELATIVE DISPLACEMENT Bit Number b b b b b Bit 0-31 n n n n n where nnnnn = 0-31 DSP96002 USER’S MANUAL 1100 000b bbbb 110S 000b bbbb 110S 000b bbbb...

  • Page 250

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 8 + jx oscillator clock cycles Memory: 2 program words A - 62 where nnn = 0-7 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 251

    ER Status Bits: Not affected. IER Flags: Not affected. MOTOROLA Bit Test Assembler Syntax: BTST #bit,X: ea BTST #bit,X: aa BTST #bit,X: pp BTST #bit,Y: ea BTST #bit,Y: aa BTST #bit,Y: pp BTST #bit,S DSP96002 USER’S MANUAL BTST A - 63...

  • Page 252

    PC RELATIVE DISPLACEMENT #bit,X: ea #bit,Y: ea 14 13 MMMR Bit Number b b b b b Bit 0-31 n n n n n where nnnnn = 0-31 DSP96002 USER’S MANUAL 1100 000b bbbb 110S 000b bbbb 110S 000b bbbb...

  • Page 253

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 4 + mvb oscillator clock cycles Memory: 1 + ea program words MOTOROLA where nnn = 0-7 DSP96002 USER’S MANUAL A - 65...

  • Page 254

    Memory: 1 + mv program words A - 66 Clear an Operand Assembler Syntax: (move syntax - see the MOVE instruction (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL description.) 0uuu 1000 1ddd MOTOROLA...

  • Page 255

    Compare Assembler Syntax: S1,S2 and sets X:(R0)+N0,D0.L Y:(R4)+,D1.S X:(R0)-N0, D0.L DSP96002 USER’S MANUAL (move syntax - see the MOVE in- struction description.) and sets LR according ly; the FCMPG – R depending on the condition of LR. – ;SET A, R, LR –...

  • Page 256

    = 0-7 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words A - 68 (move syntax - see the MOVE instruction description.) 14 13 DSP96002 USER’S MANUAL 0sss uu11 1ddd (u u) d d d Dn.L...

  • Page 257

    S1,S2 (move syntax - see the MOVE instruction de- scription.) and sets X:(R0)+N0,D0.L Y:(R4)+,D1.S X:(R0)-N0, D0.L DSP96002 USER’S MANUAL CMPG and sets LR according ly; the FCMPG – R depending on the condition of LR. – ;SET A, R, LR – i. e., ;assume line is initially...

  • Page 258

    Dn.L n n n where nnn = 0-7 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words A - 70 14 13 DSP96002 USER’S MANUAL 0sss 0110 1ddd d d d Dn.L n n n where nnn = 0-7...

  • Page 259

    CCR Condition Codes: Not affected. ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: DEBUGcc 0000 0000 0000 OnCE is a trademark of Motorola Inc. MOTOROLA Enter Debug Mode Conditionally Assembler Syntax: DEBUGcc Condition C = 0 C = 1 Z = 1 N &&...

  • Page 260

    1 1 0 0 0 1 1 0 0 1 CS(LO) 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 261

    Memory: 1 + mv program words MOTOROLA Decrement by One Assembler Syntax: (move syntax - see the MOVE instruction (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL description.) 0111 uu11 1ddd A - 73...

  • Page 262

    SSH is loaded into the PC to fetch the first instruction in the loop again. If LC equals one, the A - 74 Start Hardware Loop LA; 1 LA; 1 LA; 1 LA; 1 DSP96002 USER’S MANUAL Assembler Syntax: X: ea, label Y: ea, label S,label #count,label MOTOROLA...

  • Page 263

    MOVEC/I/M/P/S to LA, LC, SR, SP, SSH, or SSL ANDI MR ORI MR At LA: any two word instruction (F)Jcc, JMP, (F)JScc, JSR, (F)Bcc, BRA, (F)BScc, BSR, LRA, REP, RESET, RTI, RTR, RTS, STOP, WAIT MOTOROLA DSP96002 USER’S MANUAL A - 75...

  • Page 264

    When DO instructions are nested, the end of loop addresses must also be nested and are not allowed to be equal. An example is shown: A - 76 LA, LC, SSH, SSL or SP DSP96002 USER’S MANUAL MOTOROLA...

  • Page 265

    ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: DO #count,label 0000 0001 1011 MOTOROLA X:(R1)+,D3 14 13 i i i i ABSOLUTE ADDRESS DSP96002 USER’S MANUAL i i i i i i i i i i i i A - 77...

  • Page 266

    Timing: 6 + mv oscillator clock cycles Memory: 2 program words A - 78 14 13 0000 ABSOLUTE ADDRESS X: ea, label X: ea, label 14 13 MMMR ABSOLUTE ADDRESS where nnn = 0-7 DSP96002 USER’S MANUAL 0000 1ddd dddd 0000 1000 0000 MOTOROLA...

  • Page 267

    Thus the end of loop expression in the source code MOTOROLA Assembler Syntax: LA; 1 LA; 1 LA; 1 LA; 1 X:(R1)+,D3 DSP96002 USER’S MANUAL X: ea, label Y: ea, label S,label #count,label A - 79...

  • Page 268

    S,label 14 13 0000 PC RELATIVE REPLACEMENT X: ea, label Y: ea, label 14 13 MMMR PC RELATIVE REPLACEMENT DSP96002 USER’S MANUAL i i i i 0 i i i i i i i 0000 0ddd dddd 0000 0000 0000...

  • Page 269

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 8 + mv oscillator clock cycles Memory: 2 program words MOTOROLA where nnn = 0-7 DSP96002 USER’S MANUAL A - 81...

  • Page 270

    MOVEM to LA, LC, SR, SSH, SSL, OR SP MOVEP to LA, LC, SR, SSH, SSL, OR SP MOVEC from SSH MOVEM from SSH MOVEP from SSH ORI MR ANDI MR 14 13 0000 DSP96002 USER’S MANUAL ENDDO 0000 0000 0111 MOTOROLA...

  • Page 271

    Memory: 1 + mv program words MOTOROLA Assembler Syntax: (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL (move syntax - see the MOVE in- struction description.) 0sss uu10 1ddd A - 83...

  • Page 272

    Memory: 1 + mv program words A - 84 Assembler Syntax: EXT D (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL (move syntax - see the MOVE in- struction description.) 0001 uu00 1ddd MOTOROLA...

  • Page 273

    Memory: 1 + mv program words MOTOROLA Assembler Syntax: EXTB D (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL EXTB (move syntax - see the MOVE in- struction description.) 0001 uu01 1ddd...

  • Page 274

    -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 86 Absolute Value Assembler Syntax: FABS.S D (move syntax - see the MOVE in- DSP96002 USER’S MANUAL FABS.S struction description.) MOTOROLA...

  • Page 275

    Instruction Fields: (u u) d d d n n n Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0001 uu11 0ddd A - 87...

  • Page 276

    -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 88 Absolute Value Assembler Syntax: FABS.X D tion description.) DSP96002 USER’S MANUAL FABS.X (move syntax - see the MOVE instruc- MOTOROLA...

  • Page 277

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0001 uu10 0ddd A - 89...

  • Page 278

    IER Flags: Flags changed according to standard definition. Instruction Format: FADD.S S,D A - 90 Floating-Point Add Assembler Syntax: FADD.S S,D (move syntax - see the MOVE instruction description.) DSP96002 USER’S MANUAL FADD.S (move syntax - see the MOVE instruc- tion description.) MOTOROLA...

  • Page 279

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss uu01 1ddd A - 91...

  • Page 280

    -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 92 Floating-Point Add Assembler Syntax: FADD.X S,D tion description.) DSP96002 USER’S MANUAL FADD.X (move syntax - see the MOVE instruc- MOTOROLA...

  • Page 281

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss uu00 0ddd A - 93...

  • Page 282

    -Set if result of the addition is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 94 Add and Subtract Assembler Syntax: FADDSUB.S D1,D2 DSP96002 USER’S MANUAL FADDSUB.S (move syntax - see the MOVE instruc- tion description.) MOTOROLA...

  • Page 283

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss uu01 1ddd A - 95...

  • Page 284

    -Set if result of the addition is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 96 Add and Subtract Assembler Syntax: FADDSUB.X D1,D2 (move syntax - see the MOVE DSP96002 USER’S MANUAL FADDSUB.X instruction description.) MOTOROLA...

  • Page 285

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss uu01 0ddd A - 97...

  • Page 286

    NAN v Z v N = 1 I = 0 NAN v ~(N v Z) = 1 NAN v Z v ~N = 1 NAN = 0 N = 0 NAN = 1 DSP96002 USER’S MANUAL FBcc Non-aware Set UNCC* MOTOROLA...

  • Page 287

    Instruction Format: FBcc label 0000 0011 0000 MOTOROLA 14 13 aaaa PC RELATIVE DISPLACEMENT 14 13 001R PC RELATIVE DISPLACEMENT 14 13 0000 PC RELATIVE DISPLACEMENT DSP96002 USER’S MANUAL cccc 0aaa aaaa cccc 0000 0000 cccc 0000 0000 A - 99...

  • Page 288

    1 0 0 1 1 1 0 1 0 0 NINF 1 0 1 0 1 NGLE 1 0 1 1 0 1 0 1 1 1 NE(Q) 1 1 0 0 0 1 1 0 0 1 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 289

    IER and the UNCC bit in the ER if the NAN bit is set. This action occurs before stacking the status register when the specified non-aware floating-point condition is true. MOTOROLA Assembler Syntax: FBScc FBScc FBScc DSP96002 USER’S MANUAL FBScc label (short) label A - 101...

  • Page 290

    NAN v Z v N = 1 I = 0 NAN v ~(N v Z) = 1 NAN v Z v ~N = 1 NAN = 0 N = 0 NAN = 1 DSP96002 USER’S MANUAL Non-aware* Set UNCC MOTOROLA...

  • Page 291

    1 0 1 0 0 NINF 1 0 1 0 1 NGLE 1 0 1 1 0 1 0 1 1 1 NE(Q) 1 1 0 0 0 1 1 0 0 1 DSP96002 USER’S MANUAL cccc 0aaa aaaa cccc 0000 0000 cccc 0000...

  • Page 292

    OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA A - 104 Assembler Syntax: FCLR (move syntax - see the MOVE instruction description.) 14 13 DSP96002 USER’S MANUAL FCLR (move syntax - see the MOVE instruc- tion description.) 0000 uu11 0ddd...

  • Page 293

    Instruction Fields: (u u) d d d n n n Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA where nnn = 0-7 DSP96002 USER’S MANUAL A - 105...

  • Page 294

    -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 106 Compare Two Assembler Syntax: FCMP S1,S2 DSP96002 USER’S MANUAL FCMP (move syntax - see the MOVE in- struction description.) MOTOROLA...

  • Page 295

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss uu01 0ddd A - 107...

  • Page 296

    Graphics Compare Assembler Syntax: FCMPG S1,S2 and sets – R depending on the condition X:(R0)+N0,D0.S Y:(R4)+,D1.S X:(R0)-N0, D0.S DSP96002 USER’S MANUAL FCMPG (move syntax - see the MOVE in- struction description.) and sets LR according ly; the FC- – ;SET A, R, LR –...

  • Page 297

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss uu10 1ddd A - 109...

  • Page 298

    SNAN -Set if operand is a signaling NaN. Cleared otherwise. -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. A - 110 Compare Magnitude Assembler Syntax: FCMPM S1,S2 DSP96002 USER’S MANUAL FCMPM (move syntax - see the MOVE in- struction description.) MOTOROLA...

  • Page 299

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss uu01 1ddd A - 111...

  • Page 300

    -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 112 Copy Sign Assembler Syntax: FCOPYS.S S,D DSP96002 USER’S MANUAL FCOPYS.S (move syntax - see the MOVE in- struction description.) MOTOROLA...

  • Page 301

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss uu11 1ddd A - 113...

  • Page 302

    -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 114 Copy Sign Assembler Syntax: FCOPYS.X S,D DSP96002 USER’S MANUAL FCOPYS.X (move syntax - see the MOVE in- struction description.) MOTOROLA...

  • Page 303

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss uu11 1ddd A - 115...

  • Page 304

    Note: The operands for the ERR condition are taken from the ER register. * See description of the UNcc bit in Section A.4. CCR Condition Codes: Not affected. Once is a trademark of Motorola Inc. A - 116 Enter Debug Mode Conditionally...

  • Page 305

    1 0 1 0 0 NINF 1 0 1 0 1 NGLE 1 0 1 1 0 1 0 1 1 1 NE(Q) 1 1 0 0 0 1 1 0 0 1 DSP96002 USER’S MANUAL cccc 1111 1111 A - 117...

  • Page 306

    ;extract normalized mantissa ;extract unbiased exponent ;move unbiased exponent ;scale original mantissa Output (SEP) NaN, signals OPERR signed mantissa -0.0 +0.0 signed mantissa NaN, signals OPERR DSP96002 USER’S MANUAL FGETMAN (move syntax - see the MOVE in- struction description.) MOTOROLA...

  • Page 307

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss uu10 0ddd A - 119...

  • Page 308

    -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. Instruction Fields: A - 120 Assembler Syntax: FINT S,D (move syntax - see the MOVE instruction de- scription.) DSP96002 USER’S MANUAL FINT then 110.50 rounds to MOTOROLA...

  • Page 309

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss uu11 0ddd A - 121...

  • Page 310

    NAN v Z v N = 1 I = 0 NAN v ~(N v Z) = 1 NAN v Z v ~N = 1 NAN = 0 N = 0 NAN = 1 DSP96002 USER’S MANUAL FJcc Non-aware Set UNCC* MOTOROLA...

  • Page 311

    "YES" above). Not affected otherwise. Instruction Format: FJcc label (short) 0000 0011 10aa Instruction Format: FJcc 0000 0011 0000 OPTIONAL EFFECTIVE ADDRESS EXTENSION MOTOROLA 14 13 aaaa 14 13 MMMR DSP96002 USER’S MANUAL cccc 1aaa aaaa cccc 1000 0000 A - 123...

  • Page 312

    1 0 0 1 1 1 0 1 0 0 NINF 1 0 1 0 1 NGLE 1 0 1 1 0 1 0 1 1 1 NE(Q) 1 1 0 0 0 1 1 0 0 1 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 313

    NAN v Z v N = 1 I = 0 NAN v ~(N v Z) = 1 NAN v Z v ~N = 1 NAN = 0 N = 0 NAN = 1 DSP96002 USER’S MANUAL FJScc Non-aware Set UNCC* A - 125...

  • Page 314

    "YES" above). Not affected otherwise. Instruction Fields: Instruction Format: FJScc label (short) 0000 0011 11aa Instruction Format: FJScc 0000 0011 0100 OPTIONAL EFFECTIVE ADDRESS EXTENSION A - 126 14 13 aaaa 14 13 MMMR DSP96002 USER’S MANUAL cccc 1aaa aaaa cccc 1000 0000 MOTOROLA...

  • Page 315

    1 0 0 1 1 1 0 1 0 0 NINF 1 0 1 0 1 NGLE 1 0 1 1 0 1 0 1 1 1 NE(Q) 1 1 0 0 0 1 1 0 0 1 DSP96002 USER’S MANUAL A - 127...

  • Page 316

    OPERR-Always cleared. SNAN -Always cleared. -Always cleared. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 128 Conversion Assembler Syntax: FLOAT.S D DSP96002 USER’S MANUAL FLOAT.S (move syntax - see the MOVE in- struction description.) MOTOROLA...

  • Page 317

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0100 uu11 0ddd A - 129...

  • Page 318

    OPERR-Always cleared. SNAN -Always cleared. -Always cleared. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 130 Conversion Assembler Syntax: FLOAT.X D DSP96002 USER’S MANUAL FLOAT.X (move syntax - see the MOVE in- struction description.) MOTOROLA...

  • Page 319

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0100 uu10 0ddd A - 131...

  • Page 320

    SNAN -Always cleared. -Always cleared. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 132 Unsigned Integer to Assembler Syntax: FLOATU.S D (move syntax - see the MOVE instruction de- scription.) DSP96002 USER’S MANUAL FLOATU.S MOTOROLA...

  • Page 321

    Instruction Fields: (u u) d d d n n n Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0101 uu11 0ddd A - 133...

  • Page 322

    OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA A - 134 Unsigned Integer to Assembler Syntax: FLOATU.X D (move syntax - see the MOVE instruction description.) 14 13 DSP96002 USER’S MANUAL FLOATU.X (move syntax - see the MOVE in- struction description.) 0101 uu10 0ddd...

  • Page 323

    Instruction Fields: (u u) D ddd Dnnnn Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA where nnn = 0-7 DSP96002 USER’S MANUAL A - 135...

  • Page 324

    SNAN -Set if operand is a signaling NaN. Cleared otherwise. -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. A - 136 Assembler Syntax: FLOOR S,D (move syntax - see the MOVE in- DSP96002 USER’S MANUAL FLOOR struction description.) MOTOROLA...

  • Page 325

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss uu11 0ddd A - 137...

  • Page 326

    A - 138 Floating-Point Multiply and Add Assembler Syntax: FMPY S1,S2,D1 FADD.S S3,D2 (move syntax - see the MOVE instruction de- scription.) FMPY S2,S1,D1 FADD.S S3,D2 (move syntax - see the MOVE instruction de- scription.) DSP96002 USER’S MANUAL FMPY//FADD.S MOTOROLA...

  • Page 327

    1 1 1 1 Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nn = 0-3 where nn = 0-3 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss ddQQ QQDD A - 139...

  • Page 328

    A - 140 Floating-Point Multiply and Add Assembler Syntax: FMPY S1,S2,D1 FADD.X S3,D2 (move syntax - see the MOVE instruction descrip- tion.) FMPY S2,S1,D1 FADD.X S3,D2 (move syntax - see the MOVE instruction descrip- tion.) DSP96002 USER’S MANUAL FMPY//FADD.X MOTOROLA...

  • Page 329

    1 1 1 1 Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nn = 0-3 where nn = 0-3 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss ddQQ QQDD A - 141...

  • Page 330

    - Not affected. - Not affected. A - 142 Assembler Syntax: FMPY S1,S2,D1 FADDSUB.S D3,D2 (move syntax - see the MOVE instruction descrip- tion.) FMPY S2,S1,D1 FADDSUB.S D3,D2 (move syntax - see the MOVE instruction descrip- tion.) DSP96002 USER’S MANUAL FMPY//FADDSUB.S MOTOROLA...

  • Page 331

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nn = 0-3 where nn = 0-3 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss ddQQ QQDD S1*S2 Q QQ Q D0*D4...

  • Page 332

    - Not affected. - Not affected. A - 144 Assembler Syntax: FMPY S1,S2,D1 FADDSUB.X D3,D2 (move syntax - see the MOVE instruction de- scription.) FMPY S2,S1,D1 FADDSUB.X D3,D2 (move syntax - see the MOVE instruction de- scription.) DSP96002 USER’S MANUAL FMPY//FADDSUB.X MOTOROLA...

  • Page 333

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nn = 0-3 where nn = 0-3 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss ddQQ QQDD S1*S2 Q QQ Q D0*D4...

  • Page 334

    A - 146 Floating-Point Multiply and Subtract Assembler Syntax: FMPY S1,S2,D1 FSUB.S S3,D2 (move syntax - see the MOVE instruction descrip- tion.) FMPY S2,S1,D1 FSUB.S S3,D2 (move syntax - see the MOVE instruction descrip- tion.) DSP96002 USER’S MANUAL FMPY//FSUB.S MOTOROLA...

  • Page 335

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the MOVE instruction de- 14 13 where nn = 0-3 where nn = 0-3 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss ddQQ QQDD A - 147...

  • Page 336

    FMPY S2,S1,D1 FSUB.S S3,D2 (move syntax - see the MOVE instruction de- scription.) A - 148 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 337

    MOTOROLA DSP96002 USER’S MANUAL A - 149...

  • Page 338

    A - 150 Floating-Point Multiply and Subtract Assembler Syntax: FMPY S1,S2,D1 FSUB.X S3,D2 (move syntax - see the MOVE instruction descrip- tion.) FMPY S2,S1,D1 FSUB.X S3,D2 (move syntax - see the MOVE instruction descrip- tion.) DSP96002 USER’S MANUAL FMPY//FSUB.X MOTOROLA...

  • Page 339

    1 1 1 1 Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA where nn = 0-3 14 13 where nn = 0-3 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss ddQQ QQDD A - 151...

  • Page 340

    IER Flags: Flags changed according to standard definition. A - 152 Assembler Syntax: FMPY.S S1,S2,D (move syntax - see the MOVE instruction de- scription.) FMPY.S S2,S1,D (move syntax - see the MOVE instruction de- scription.) DSP96002 USER’S MANUAL FMPY.S MOTOROLA...

  • Page 341

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 14 13 where nnn = 0-7 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss SSS1 0ddd 0sss 11S1 0ddd A - 153...

  • Page 342

    IER Flags: Flags changed according to standard definition. A - 154 Assembler Syntax: FMPY.X S1,S2,D (move syntax - see the MOVE instruction descrip- tion.) FMPY.X S2,S1,D (move syntax - see the MOVE instruction descrip- tion.) DSP96002 USER’S MANUAL FMPY.X MOTOROLA...

  • Page 343

    14 13 14 13 where nnn = 0-7 where nnn = 0-7 where nnn = 0-7 where nnn = 0-7 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss SSS0 0ddd 0sss 11s0 0ddd A - 155...

  • Page 344

    -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 156 Negate Assembler Syntax: FNEG.S D (move syntax - see the MOVE instruction description.) DSP96002 USER’S MANUAL FNEG.S MOTOROLA...

  • Page 345

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the MOVE instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0001 uu01 0ddd A - 157...

  • Page 346

    Instruction Format: FNEG.X D (move syntax - see the MOVE instruction description.) DATA BUS MOVE FIELD OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA A - 158 Negate Assembler Syntax: FNEG.X D (move syntax - see the MOVE instruction descrip- tion.) 14 13 DSP96002 USER’S MANUAL FNEG.X 0001 uu00 0ddd MOTOROLA...

  • Page 347

    Instruction Fields: (u u) d d d n n n Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA where nnn = 0-7 DSP96002 USER’S MANUAL A - 159...

  • Page 348

    - Not affected. - Not affected. A - 160 Scale Assembler Syntax: FSCALE.S S,D (move syntax - see the MOVE instruction description.) FSCALE.S #byte,D ;extract normalized mantissa ;extract unbiased exponent ;move unbiased exponent ;scale original mantissa DSP96002 USER’S MANUAL FSCALE.S MOTOROLA...

  • Page 349

    Timing: 2 + mv + da oscillator clock cycles (2 + da oscillator clock cycles for FSCALE.S #byte,D) Memory: 1 + mv program words MOTOROLA 14 13 14 13 0000 where nnn = 0-7 where nnn = 0-7 program word for FSCALE.S #byte,D DSP96002 USER’S MANUAL 0sss uu10 1ddd 1nnn nnnn nddd A - 161...

  • Page 350

    - Not affected. - Not affected. A - 162 Scale Assembler Syntax: FSCALE.X S,D (move syntax - see the MOVE instruction description.) FSCALE.X #byte,D ;extract normalized mantissa ;extract unbiased exponent ;move unbiased exponent ;scale original mantissa DSP96002 USER’S MANUAL FSCALE.X MOTOROLA...

  • Page 351

    Timing: 2 + mv + da oscillator clock cycles (2 + da oscillator clock cycles for FSCALE.X #byte,D) Memory: 1 + mv program words MOTOROLA 14 13 14 13 0000 where nnn = 0-7 where nnn = 0-7 program word for FSCALE.X #byte,D DSP96002 USER’S MANUAL 0sss uu10 0ddd 0nnn nnnn nddd A - 163...

  • Page 352

    - Set if result is infinity. Cleared otherwise. - Not affected. – - Not affected. - Not affected. A - 164 Assembler Syntax: FSEEDD S,D Result QNaN +/- infinity normalized, then FSEEDD approximation FSEEDD approximation +/- zero DSP96002 USER’S MANUAL FSEEDD MOTOROLA...

  • Page 353

    Timing: 2 + da oscillator clock cycles Memory: 1 program words MOTOROLA 14 13 0000 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss 1111 1ddd A - 165...

  • Page 354

    - Set if result is negative. Cleared otherwise. - Set if result is infinity. Cleared otherwise. - Not affected. – - Not affected. - Not affected. A - 166 Square Root Assembler Syntax: FSEEDR S,D DSP96002 USER’S MANUAL FSEEDR MOTOROLA...

  • Page 355

    Timing: 2 + da oscillator clock cycles Memory: 1 program words MOTOROLA 14 13 0000 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss 1111 0ddd A - 167...

  • Page 356

    SNAN -Set if operand is a signaling NaN. Cleared otherwise. -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 168 Assembler Syntax: FSUB.S S,D (move syntax - see the MOVE instruction description.) DSP96002 USER’S MANUAL FSUB.S MOTOROLA...

  • Page 357

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss uu00 1ddd A - 169...

  • Page 358

    SNAN -Set if operand is a signaling NaN. Cleared otherwise. -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 170 Assembler Syntax: FSUB.X S,D (move syntax - see the MOVE instruction description.) DSP96002 USER’S MANUAL FSUB.X MOTOROLA...

  • Page 359

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss uu00 0ddd A - 171...

  • Page 360

    -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 172 Data ALU Register Assembler Syntax: FTFR.S S,D (move syntax - see the MOVE instruction description.) DSP96002 USER’S MANUAL FTFR.S MOTOROLA...

  • Page 361

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss uu11 1ddd A - 173...

  • Page 362

    -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 174 Data ALU Register Assembler Syntax: FTFR.X S,D (move syntax - see the MOVE instruction description.) DSP96002 USER’S MANUAL FTFR.X MOTOROLA...

  • Page 363

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss uu11 0ddd A - 175...

  • Page 364

    NAN v Z v N = 1 I = 0 NAN v ~(N v Z) = 1 NAN v Z v ~N = 1 NAN = 0 N = 0 NAN = 1 DSP96002 USER’S MANUAL FTRAPcc Non-aware Set UNCC* MOTOROLA...

  • Page 365

    1 0 1 0 0 NINF 1 0 1 0 1 NGLE 1 0 1 1 0 1 0 1 1 1 NE(Q) 1 1 0 0 0 1 1 0 0 1 DSP96002 USER’S MANUAL cccc 0000 0011 A - 177...

  • Page 366

    SNAN -Set if operand is a signaling NaN. Cleared otherwise. -Set if result is a NaN. Cleared otherwise. UNCC -Always cleared. IER Flags: Flags changed according to standard definition. A - 178 Assembler Syntax: FTST (move syntax - see the Move instruction description.) DSP96002 USER’S MANUAL FTST MOTOROLA...

  • Page 367

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the Move instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0110 uu00 0ddd A - 179...

  • Page 368

    - Not affected. - Not affected. A - 180 Extract Exponent Assembler Syntax: GETEXP S,D (move syntax - see the Move instruction description.) ;extract normalized mantissa ;extract unbiased exponent ;move unbiased exponent ;scale original mantissa DSP96002 USER’S MANUAL GETEXP MOTOROLA...

  • Page 369

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss 0110 0ddd A - 181...

  • Page 370

    ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: ILLEGAL 0000 0000 0000 Instruction Fields: None Timing: 8 oscillator clock cycles Memory: 1 program words A - 182 Assembler Syntax: ILLEGAL 14 13 0000 DSP96002 USER’S MANUAL ILLEGAL 0000 0000 0101 MOTOROLA...

  • Page 371

    Memory: 1 + mv program words MOTOROLA Increment by One Assembler Syntax: (move syntax - see the Move instruction description.) (move syntax - see the Move instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0110 uu11 0ddd A - 183...

  • Page 372

    -Set if the floating-point operand has no exact integer representation. Cleared oth- erwise. -Always cleared. -Always cleared. A - 184 Assembler Syntax: (move syntax - see the Move instruction description.) Description: Result $7FFFFFFF $80000000 $7FFFFFFF $80000000 $FFFFFFFF DSP96002 USER’S MANUAL MOTOROLA...

  • Page 373

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the Move instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0011 uu00 0ddd A - 185...

  • Page 374

    - Set if source operand is infinity. Cleared otherwise. - Not affected. – - Not affected. - Not affected. A - 186 Floating-Point Assembler Syntax: INTRZ (move syntax - see the Move instruction de- scription.) Result $7FFFFFFF $80000000 $7FFFFFFF $80000000 $FFFFFFFF DSP96002 USER’S MANUAL INTRZ MOTOROLA...

  • Page 375

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the Move instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0011 uu10 0ddd A - 187...

  • Page 376

    - Set if source operand is infinity. Cleared otherwise. - Not affected. – - Not affected. - Not affected. A - 188 Floating-Point Assembler Syntax: INTU (move syntax - see the Move instruction description.) Result $7FFFFFFF $80000000 $7FFFFFFF $80000000 $FFFFFFFF $00000000 DSP96002 USER’S MANUAL INTU MOTOROLA...

  • Page 377

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the Move instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0010 uu00 0ddd A - 189...

  • Page 378

    - Set if source operand is infinity. Cleared otherwise. - Not affected. – - Not affected. - Not affected. A - 190 Floating-Point Assembler Syntax: INTURZ D Result $7FFFFFFF $80000000 $7FFFFFFF $80000000 $FFFFFFFF DSP96002 USER’S MANUAL INTURZ (move syntax - see the Move in- struction description.) MOTOROLA...

  • Page 379

    Timing: 2 + mv + da oscillator clock cycles Memory: 1 + mv program words MOTOROLA (move syntax - see the Move instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0010 uu10 0ddd A - 191...

  • Page 380

    Z v C = 0 Z v (N && V) = 1 Z v C = 1 N && V = 1 N = 1 Z = 0 N = 0 V = 0 V = 1 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 381

    1 1 0 0 1 CS(LO) 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 DSP96002 USER’S MANUAL cccc 1aaa aaaa cccc 1000 0000...

  • Page 382

    A - 194 Jump if Bit Clear Assembler Syntax: JCLR #bit,X: ea, label JCLR #bit,X: aa, label JCLR #bit,X: pp, label JCLR #bit,Y: ea, label JCLR #bit,Y: aa, label JCLR #bit,Y: pp, label JCLR #bit,S,label DSP96002 USER’S MANUAL JCLR MOTOROLA...

  • Page 383

    ABSOLUTE ADDRESS EXTENSION 14 13 0aaa ABSOLUTE ADDRESS EXTENSION 14 13 MMMR ABSOLUTE ADDRESS EXTENSION Bit Number b b b b b Bit 0-31 n n n n n DSP96002 USER’S MANUAL 0100 100b bbbb 010S 100b bbbb 010S 100b bbbb 010S...

  • Page 384

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 6 + jx oscillator clock cycles Memory: 2 program words A - 196 where nnn = 0-7 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 385

    Short Jump Address - aaaaaaaaaaaaaaa (15 bits) Timing: 4 + jx oscillator clock cycles Memory: 1 + ea program words MOTOROLA Jump Assembler Syntax: label (short) 14 13 aaaa 14 13 MMMR DSP96002 USER’S MANUAL 1111 1aaa aaaa 1111 1000 0000 A - 197...

  • Page 386

    Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words A - 198 Assembler Syntax: JOIN (move syntax - see the Move instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL JOIN 0sss 1010 0ddd MOTOROLA...

  • Page 387

    Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA Assembler Syntax: JOINB (move syntax - see the Move instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL JOINB 0sss 1010 1ddd A - 199...

  • Page 388

    Z v C = 0 Z v (N && V) = 1 Z v C = 1 N && V = 1 N = 1 Z = 0 N = 0 V = 0 V = 1 DSP96002 USER’S MANUAL JScc MOTOROLA...

  • Page 389

    1 1 0 0 1 CS(LO) 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 DSP96002 USER’S MANUAL cccc 1aaa aaaa cccc 1000 0000...

  • Page 390

    IER Flags: Not affected. Instruction Fields: A - 202 Assembler Syntax: JSCLR #bit,X: ea, label JSCLR #bit,X: aa, label JSCLR #bit,X: pp, label JSCLR #bit,Y: ea, label JSCLR #bit,Y: aa, label JSCLR #bit,Y: pp, label JSCLR #bit,S,label DSP96002 USER’S MANUAL JSCLR MOTOROLA...

  • Page 391

    ABSOLUTE ADDRESS EXTENSION #bit,X: aa, label #bit,Y: aa, label 14 13 0aaa ABSOLUTE ADDRESS EXTENSION #bit,X: ea, label #bit,Y: ea, label 14 13 MMMR ABSOLUTE ADDRESS EXTENSION DSP96002 USER’S MANUAL 0100 100b bbbb 010S 100b bbbb 010S 100b bbbb 010S...

  • Page 392

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 6 + jx oscillator clock cycles Memory: 2 program words A - 204 where nnn = 0-7 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 393

    MOTOROLA Jump if Bit Set Assembler Syntax: JSET #bit,X: ea, label JSET #bit,X: aa, label JSET #bit,X: pp, label JSET #bit,Y: ea, label JSET #bit,Y: aa, label JSET #bit,Y: pp, label JSET #bit,S,label DSP96002 USER’S MANUAL JSET A - 205...

  • Page 394

    #bit,X: ea, label #bit,X: ea, label 14 13 MMMR ABSOLUTE ADDRESS EXTENSION Bit Number b b b b b Bit 0-31 n n n n n where nnnnn = 0-31 DSP96002 USER’S MANUAL 1100 100b bbbb 110S 100b bbbb 110S 100b bbbb...

  • Page 395

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 6 + jx oscillator clock cycles Memory: 2 program words MOTOROLA where nnn = 0-7 DSP96002 USER’S MANUAL A - 207...

  • Page 396

    Short Jump Address - aaaaaaaaaaaaaaa (15 bits) Timing: 4 + jx oscillator clock cycles Memory: 1 + ea program words A - 208 Jump to Subroutine Assembler Syntax: label (short) 14 13 aaaa 14 13 MMMR DSP96002 USER’S MANUAL 1111 1aaa aaaa 1111 1000 0000 MOTOROLA...

  • Page 397

    IER Flags: Not affected. Instruction Fields: MOTOROLA Assembler Syntax: JSSET #bit,X: ea, label JSSET #bit,X: aa, label JSSET #bit,X: pp, label JSSET #bit,Y: ea, label JSSET #bit,Y: aa, label JSSET #bit,Y: pp, label JSSET #bit,S,label DSP96002 USER’S MANUAL JSSET A - 209...

  • Page 398

    #bit,X: ea, label #bit,Y: ea, label 14 13 MMMR ABSOLUTE ADDRESS EXTENSION Bit Number b b b b b Bit 0-31 n n n n n where nnnnn = 0-31 DSP96002 USER’S MANUAL 1100 100b bbbb 110S 100b bbbb 110S 100b bbbb...

  • Page 399

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 6 + jx oscillator clock cycles Memory: 2 program words MOTOROLA where nnn = 0-7 DSP96002 USER’S MANUAL A - 211...

  • Page 400

    For destination operands other than SR: - Not affected. - Not affected. - Not affected. - Not affected. - Not affected. - Not affected. – - Not affected. - Not affected. A - 212 Assembler Syntax: ea,D (Rn+displacement),D CAUTION DSP96002 USER’S MANUAL MOTOROLA...

  • Page 401

    -Set according to bit 20 of the source operand. For destination operands other than SR: SINX - Not affected. - Not affected. SUNF - Not affected. SOVF - Not affected. SIOP - Not affected. MOTOROLA DSP96002 USER’S MANUAL A - 213...

  • Page 402

    1 1 1 1 1 1 1 Timing: 4 + le oscillator clock cycles Memory: 1 + ea program words A - 214 14 13 0MMR 14 13 000R LONG DISPLACEMENT where nnn = 0-7 DSP96002 USER’S MANUAL 0000 1ddd dddd 0000 1ddd dddd MOTOROLA...

  • Page 403

    For destination operands other than SR: - Not affected. - Not affected. - Not affected. - Not affected. - Not affected. - Not affected. – - Not affected. - Not affected. MOTOROLA Assembler Syntax: Rn,D label,D CAUTION DSP96002 USER’S MANUAL A - 215...

  • Page 404

    PC+xxxx A - 216 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 405

    -Set according to bit 20 of the source operand. For destination operands other than SR: SINX - Not affected. - Not affected. SUNF - Not affected. SOVF - Not affected. SIOP - Not affected. MOTOROLA DSP96002 USER’S MANUAL A - 217...

  • Page 406

    1 1 1 1 1 1 1 Timing: 4 + lr oscillator clock cycles Memory: 1 + lr program words A - 218 14 13 001R 14 13 000R where nnn = 0-7 DSP96002 USER’S MANUAL 0000 0ddd dddd 0000 0ddd dddd MOTOROLA...

  • Page 407

    - Set if result is negative. Cleared otherwise. - Not affected. - Not affected. – - Not affected. - Not affected. ER Status Bits: Not affected. IER Flags: Not affected. MOTOROLA Logical Shift Left DSP96002 USER’S MANUAL (parallel data bus move) A - 219...

  • Page 408

    (move syntax - see the Move instruction description.) 14 13 (move syntax - see the Move instruction description.) 14 13 14 13 0000 14 13 0000 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0100 uu01 1ddd 0sss 0010 0ddd 011n nnnn nddd...

  • Page 409

    - Set if result is negative. Cleared otherwise. - Not affected. - Not affected. – - Not affected. - Not affected. ER Status Bits: Not affected. IER Flags: Not affected. MOTOROLA Logical Shift Right DSP96002 USER’S MANUAL (parallel data bus move) A - 221...

  • Page 410

    (move syntax - see the Move instruction description.) 14 13 (move syntax - see the Move instruction description.) 14 13 14 13 0000 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0000 uu01 1ddd 0sss 0010 1ddd 010n...

  • Page 411

    Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA Move Data Registers Assembler Syntax: MOVE (See the MOVE instruction description.) 14 13 14 13 DSP96002 USER’S MANUAL MOVE 0000 0000 0000 0000 0000 0100 A - 223...

  • Page 412

    No data bus move activity. Instruction Format: Opcode-operands 0000 0000 0110 Instruction Fields: None. Timing: 0 oscillator clock cycles Memory: 0 program words A - 224 No Parallel Data Move Assembler Syntax: Opcode-Operands 14 13 0000 DSP96002 USER’S MANUAL Move uuuu uuuu uuuu MOTOROLA...

  • Page 413

    10DD DDDD Double Precision Instruction Format - Opcode-operands: S2, D2 0001 011D DDDD MOTOROLA Assembler Syntax: Opcode-Operands Opcode-Operands CAUTION 14 13 dddd 14 13 0ddd DSP96002 USER’S MANUAL Move S1,D1 S2,D2 uuuu uuuu uuuu uuuu uuuu uuuu A - 225...

  • Page 414

    D0.D-D7.D reserved D9.ML D8.ML D9.D D8.D DSP96002 USER’S MANUAL D D D D D d d d d d 1 1 n n n where nnn = 0-7 1 0 n n n 0 1 x x x 0 0 1 1 1...

  • Page 415

    0101 1011 Instruction Fields: ea Rn - R0-R7 (Update addressing modes only) Timing: 0 oscillator clock cycles Memory: 0 program words MOTOROLA Move Update Assembler Syntax: Opcode-Operands 14 13 MMMR DSP96002 USER’S MANUAL Move uuuu uuuu uuuu A - 227...

  • Page 416

    Data ALU operation in the same instruc- tion. See restrictions in Section A.10.6 concerning Rn, Mn, and Nn registers as a destination. A - 228 X Memory Move Assembler Syntax: X: ea, D X:(Rn+displacement),D S,X: ea S,X:(Rn+displacement) #Data,D CAUTION DSP96002 USER’S MANUAL Move MOTOROLA...

  • Page 417

    OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA Instruction Format - Opcode-operands: 0000 11DD DDDD MOTOROLA S,X: ea X: ea, D #Data,D 14 13 MMMR S,X:(Rn+displacement) X:(Rn+displacement),D 14 13 0W1R LONG DISPLACEMENT DSP96002 USER’S MANUAL uuuu uuuu uuuu uuuu uuuu uuuu A - 229...

  • Page 418

    1 0 0 1 1 1 R0-R7 1 0 1 n n n N0-N7 1 1 0 n n n M0-M7 1 1 1 n n n Timing: ea + ax oscillator clock cycles Memory: ea program words A - 230 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 419

    OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA MOTOROLA Assembler Syntax: X: ea, D1 S1,X: ea #Data,D1 X: ea, D1S2,D2 S1,X: ea S2,D2 #Data,D1S2,D2 14 13 MMMR DSP96002 USER’S MANUAL Move X: R S2,D2 S2,D2 S2,D2 uuuu uuuu uuuu A - 231...

  • Page 420

    D2.S 0 1 0 D7.S 1 1 D3.S 0 1 1 D0.S 0 0 D4.S 1 0 0 D1.S 0 1 D5.S 1 0 1 D2.S 1 0 D6.S 1 1 0 D3.S 1 1 D7.S 1 1 1 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 421

    See restrictions in Section A.10.6 concerning Rn, Mn, and Nn registers as a destination. Instruction Fields: <ea> Rn - R0-R7 (Memory addressing modes only) MOTOROLA Y Memory Move Assembler Syntax: Opcode-Operands Opcode-Operands Opcode-Operands Opcode-Operands Opcode-Operands CAUTION DSP96002 USER’S MANUAL Move Y: ea, D Y:(Rn+displacement),D S,Y: ea S,Y:(Rn+displacement) #Data,D A - 233...

  • Page 422

    Timing: ea + ay oscillator clock cycles Memory: ea program words A - 234 S,Y: ea Y: ea, D #Data,D 14 13 MMMR S,Y:(Rn+displacement) Y:(Rn+displacement),D 14 13 1W1R LONG DISPLACEMENT DSP96002 USER’S MANUAL uuuu uuuu uuuu uuuu uuuu uuuu MOTOROLA...

  • Page 423

    Assembler Syntax: Y:<ea> Opcode-Operands Opcode-Operands Y:<ea> Opcode-Operands #xxxx Y: ea, D2 S1,D1 S2,Y: ea S1,D1 #Data,D2 14 13 MMMR DSP96002 USER’S MANUAL Move Y: R S1,D1 Y: ea, D2 S1,D1 S2,Y: ea S1,D1 #Data,D2 uuuu uuuu uuuu A - 235...

  • Page 424

    D2.S 0 1 0 D7.S 1 1 D3.S 0 1 1 D0.S 0 0 D4.S 1 0 0 D1.S 0 1 D5.S 1 0 1 D2.S 1 0 D6.S 1 1 0 D3.S 1 1 D7.S 1 1 1 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 425

    Assembler Syntax: D(LS) L: ea, D L:(Rn+displacement),D D(LS) S,L: ea Y:<ea> S,L:(Rn+displacement) Y:<Rn+xxxx> L: ea, D S,L: ea 14 13 MMMR L:(Rn+displacement),D S,L:(Rn+displacement) 14 13 0W0R LONG DISPLACEMENT DSP96002 USER’S MANUAL Move uuuu uuuu uuuu uuuu uuuu uuuu A - 237...

  • Page 426

    0 0 1 1 1 D8.ML 0 0 1 1 0 D9.D 0 0 1 0 1 D8.D 0 0 1 0 0 Timing: ea + axy oscillator clock cycles Memory: ea program words A - 238 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 427

    Y:<ea> X: ea, D1 S1,X: ea Y:<ea> S1,X: ea X: ea, D1 Y:<> S1,X: ea X:(Rn+displacement),D1 Y:<> S1,X:(Rn+displacement) DSP96002 USER’S MANUAL Move X: Y: Y: ea, D2 S2,Y: ea Y: ea, D2 S2,Y: ea Y:,D2 S2,Y: Y:,D2 S2,Y: A - 239...

  • Page 428

    Floating-Point Opcodes S1,D1 X X X D0.S-D7.S n n n where nnn = 0-7 S2,D2 Y Y Y D0.S-D7.S n n n where nnn = 0-7 DSP96002 USER’S MANUAL uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu Y:,D2 uuuu...

  • Page 429

    S1,D1 S1,D1 D8.L D8.S D9.L D9.S S2,D2 S2,D2 D8.L D8.S D9.L D9.S Timing: axy oscillator clock cycles Memory: program words MOTOROLA X X X n n n where nnn = 0-7 Y Y Y DSP96002 USER’S MANUAL A - 241...

  • Page 430

    NAN v Z v N = 1 I = 0 NAN v ~(N v Z) = 1 NAN v Z v ~N = 1 NAN = 0 N = 0 NAN = 1 DSP96002 USER’S MANUAL Move FFcc FFcc FFcc Non-aware Set UNCC*...

  • Page 431

    - Set if NAN is set and a non-aware floating-point condition is tested ("cc" conditions marked "YES" above). Not affected otherwise. Instruction Format - Opcode-operands: S,D 0000 011c cccc MOTOROLA CAUTION FFcc FFcc tttT DSP96002 USER’S MANUAL uuuu uuuu uuuu A - 243...

  • Page 432

    1 0 0 1 1 1 0 1 0 0 NINF 1 0 1 0 1 NGLE 1 0 1 1 0 1 0 1 1 1 NE(Q) 1 1 0 0 0 1 1 0 0 1 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 433

    NAN v Z v N = 1 I = 0 NAN v ~(N v Z) = 1 NAN v Z v ~N = 1 NAN = 0 N = 0 NAN = 1 DSP96002 USER’S MANUAL Move FFcc.U FFcc.U FFcc.U Non-aware Set UNCC*...

  • Page 434

    NAN -Affected by the accompanying Data ALU operation if the specified condition is true. Not affected otherwise. UNCC -Set if NAN is set and a non-aware floating-point condition is tested ("cc" conditions marked "YES" above). Not affected otherwise. IER Flags: Flags changed according to standard definition. A - 246 CAUTION DSP96002 USER’S MANUAL MOTOROLA...

  • Page 435

    1 0 1 0 0 NINF 1 0 1 0 1 NGLE 1 0 1 1 0 1 0 1 1 1 NE(Q) 1 1 0 0 0 1 1 0 0 1 DSP96002 USER’S MANUAL uuuu uuuu uuuu A - 247...

  • Page 436

    Z v (N && V) = 1 Z v C = 1 N && V = 1 N = 1 Z = 0 N = 0 V = 0 V = 1 n.a. CAUTION DSP96002 USER’S MANUAL Move IFcc IFcc IFcc MOTOROLA...

  • Page 437

    - Not affected. - Not affected. SUNF - Not affected. SOVF - Not affected. SIOP - Not affected. Instruction Format - Opcode-operands: S,D 0000 011c cccc MOTOROLA IFcc IFcc 14 13 tttT DSP96002 USER’S MANUAL uuuu uuuu uuuu A - 249...

  • Page 438

    1 1 0 0 0 1 1 0 0 1 CS(LO) 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 439

    Z v (N && V) = 1 Z v C = 1 N && V = 1 N = 1 Z = 0 N = 0 V = 0 V = 1 n.a. CAUTION DSP96002 USER’S MANUAL Move IFcc.U IFcc.U IFcc.U A - 251...

  • Page 440

    - Affected by the accompanying Data ALU operation if the specified condition is true. Not affected otherwise. UNCC - Not affected. IER Flags: Flags changed according to standard definition. Instruction Format - Opcode-operands: S,D 0000 010c cccc A - 252 IFcc.U IFcc.U 14 13 tttT DSP96002 USER’S MANUAL uuuu uuuu uuuu MOTOROLA...

  • Page 441

    1 1 0 0 0 1 1 0 0 1 CS(LO) 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 DSP96002 USER’S MANUAL A - 253...

  • Page 442

    CCR Condition Codes: A - 254 MOVE(C) S3,D2 MOVE(C) S2,D1 MOVE(C) #Data,D1 MOVE(C) X: ea, D1 MOVE(C) X:(Rn+displacement),D1 MOVE(C) S1,X: ea MOVE(C) S1,X:(Rn+displacement) MOVE(C) Y: ea, D1 MOVE(C) Y:(Rn+displacement),D1 MOVE(C) S1,Y: ea MOVE(C) S1,Y:(Rn+displacement) Description: CAUTION DSP96002 USER’S MANUAL MOVE(C) MOTOROLA...

  • Page 443

    For destination operands other than SR: - Not affected. - Not affected. - Not affected. - Not affected. OPERR- Not affected. SNAN - Not affected. - Not affected. UNCC - Not affected. IER Flags: MOTOROLA DSP96002 USER’S MANUAL A - 255...

  • Page 444

    Y: ea, D1 MOVE(C) 14 13 MMMR 14 13 xxxR LONG DISPLACEMENT S1,D2 S2,D1 14 13 DDDD Register Read S Write D DSP96002 USER’S MANUAL S1,X: ea S1,Y: ea s001 0ddd dddd MOVE(C) S1,X:(Rn+displacement) MOVE(C) S1,X:(Rn+displacement) s001 0ddd dddd 0001 0ddd dddd...

  • Page 445

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 2 + mvc oscillator clock cycles Memory: 1 + ea program words MOTOROLA where nnn = 0-7 DSP96002 USER’S MANUAL A - 257...

  • Page 446

    For destination operands other than SR: - Not affected. - Not affected. - Not affected. - Not affected. - Not affected. - Not affected. – - Not affected. - Not affected. A - 258 Assembler Syntax: MOVE(I) #Data,D CAUTION DSP96002 USER’S MANUAL MOVE(I) MOTOROLA...

  • Page 447

    SUNF - Not affected. SOVF - Not affected. SIOP - Not affected. Instruction Format: MOVE(I) 0000 0000 1 i i i MOTOROLA #Data,D 14 13 i i i i DSP96002 USER’S MANUAL i i i i i ddd dddd A - 259...

  • Page 448

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 2 oscillator clock cycles Memory: 1 program words A - 260 where nnn = 0-7 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 449

    - Set according to bit 5 of the source operand. – - Set according to bit 6 of the source operand. - Set according to bit 7 of the source operand. MOTOROLA Assembler Syntax: MOVE(M) P: ea, D MOVE(M) S,P: ea CAUTION DSP96002 USER’S MANUAL MOVE(M) A - 261...

  • Page 450

    -Set according to bit 20 of the source operand. For destination operands other than SR: SINX - Not affected. - Not affected. SUNF - Not affected. SOVF - Not affected. SIOP - Not affected. A - 262 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 451

    1 1 1 1 1 1 1 Timing: 6 + mvm oscillator clock cycles Memory: 1 + ea program words MOTOROLA P: ea, D MOVE(M) S,P: ea 14 13 MMMR where nnn = 0-7 DSP96002 USER’S MANUAL 0001 0ddd dddd A - 263...

  • Page 452

    MOVE(P) Y:(Rn+displacement),X: pp MOVE(P) Y: pp, X:(Rn+displacement) MOVE(P) X:(Rn+displacement),Y: pp MOVE(P) Y: pp, Y:(Rn+displacement) MOVE(P) Y:(Rn+displacement),Y: pp MOVE(P) X: pp, P: ea MOVE(P) P: ea, X: pp MOVE(P) Y: pp, P: ea MOVE(P) P: ea, Y: pp DSP96002 USER’S MANUAL MOVE(P) MOTOROLA...

  • Page 453

    OPERR-Set according to bit 12 of the source operand. SNAN -Set according to bit 13 of the source operand. -Set according to bit 14 of the source operand. UNCC -Set according to bit 15 of the source operand. MOTOROLA CAUTION DSP96002 USER’S MANUAL A - 265...

  • Page 454

    MOVE(P) Y: ea, Y: pp MOVE(P) #Data,X: pp MOVE(P) #Data,Y: pp 14 13 MMMR MOVE(P) Y: pp, X:(Rn+displacement) MOVE(P) X:(Rn+displacement),Y: pp MOVE(P) Y: pp, Y:(Rn+displacement) MOVE(P) Y:(Rn+displacement),Y: pp 14 13 000R LONG DISPLACEMENT DSP96002 USER’S MANUAL 1sSW 1ppp pppp 1sSW 1ppp pppp MOTOROLA...

  • Page 455

    MOTOROLA MOVE(P) Y: pp, P: ea MOVE(P) P: ea, Y: pp 14 13 MMMR MOVE(P) Y: pp, D MOVE(P) S,Y: pp 14 13 dddd Peripheral W Read Write DSP96002 USER’S MANUAL 01SW 1ppp pppp 00SW 1ppp pppp A - 267...

  • Page 456

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 2 + mvp oscillator clock cycles Memory: 1 + mv program words A - 268 where nnn = 0-7 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 457

    MOVE(S) Y: aa, X:(Rn+displacement) MOVE(S) X:(Rn+displacement),Y: aa MOVE(S) Y: aa, Y:(Rn+displacement) MOVE(S) Y:(Rn+displacement),Y: aa MOVE(S) X: aa, P: ea MOVE(S) P: ea, X: aa MOVE(S) Y: aa, P: ea MOVE(S) P: ea, Y: aa DSP96002 USER’S MANUAL MOVE(S) A - 269...

  • Page 458

    OPERR-Set according to bit 12 of the source operand. SNAN -Set according to bit 13 of the source operand. -Set according to bit 14 of the source operand. UNCC -Set according to bit 15 of the source operand. A - 270 CAUTION DSP96002 USER’S MANUAL MOTOROLA...

  • Page 459

    MOVE(S) Y: aa, Y: ea MOVE(S) Y: ea, Y: aa 14 13 MMMR MOVE(S) Y: aa, X:(Rn+displacement) MOVE(S) X:(Rn+displacement),Y: aa MOVE(S) Y: aa, Y:(Rn+displacement) MOVE(S) Y:(Rn+displacement),Y: aa 14 13 000R LONG DISPLACEMENT DSP96002 USER’S MANUAL 1sSW 0aaa aaaa 1sSW 0aaa aaaa A - 271...

  • Page 460

    SIOP - Not affected. A - 272 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 461

    MOVE(S) P: ea, Y: aa 14 13 MMMR MOVE(S) Y: aa, D1 MOVE(S) S1,Y: aa 14 13 dddd 14 13 DDDD Abs. Short Location W Read Write DSP96002 USER’S MANUAL 01SW 0aaa aaaa 00SW 0aaa aaaa 000W 0aaa aaaa A - 273...

  • Page 462

    D9.D 1 0 0 0 1 0 1 D8.D 1 0 0 0 1 0 0 Timing: 2 + mvs oscillator clock cycles Memory: 1 + mv program words A - 274 where nnn = 0-7 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 463

    - Not affected. – - Not affected. - Not affected. ER Status Bits: Not affected. IER Flags: Not affected. MOTOROLA and Test Address Assembler Syntax: MOVETA (move syntax - see the Move instruction de- scription). DSP96002 USER’S MANUAL MOVETA A - 275...

  • Page 464

    Instruction Format: MOVETA (Integer NOP) DATA BUS MOVE FIELD OPTIONAL EFFECTIVE ADDRESS EXTENSION Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words A - 276 14 13 14 13 DSP96002 USER’S MANUAL 0000 1000 0010 0000 1000 0110 MOTOROLA...

  • Page 465

    – - Not affected. - Not affected. ER Status Bits: Not affected. MOTOROLA Signed Multiply Assembler Syntax: MPYS ( See the MOVE instruction description.) MPYS ( See the MOVE instruction description.) DSP96002 USER’S MANUAL MPYS S1,S2,D S2,S1,D A - 277...

  • Page 466

    A - 278 ( See the MOVE instruction description.) 14 13 ( See the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss SSS0 1ddd 0sss 11S0 1ddd MOTOROLA...

  • Page 467

    - Not affected. ER Status Bits: Not affected. IER Flags: Not affected. Instruction Fields: MOTOROLA Unsigned Multiply Assembler Syntax: MPYU ( See the MOVE instruction description.) MPYU ( See the MOVE instruction description.) DSP96002 USER’S MANUAL MPYU S1,S2,D S2,S1,D A - 279...

  • Page 468

    Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words A - 280 14 13 14 13 where nnn = 0-7 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss SSS1 1ddd 0sss 11S1 1ddd MOTOROLA...

  • Page 469

    Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA Negate Assembler Syntax: ( See the MOVE instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0101 uu11 1ddd A - 281...

  • Page 470

    Memory: 1 + mv program words A - 282 Negate with Carry Assembler Syntax: NEGC ( See the MOVE instruction description.) ( See the MOVE instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL NEGC 0001 uu11 1ddd MOTOROLA...

  • Page 471

    ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: NOP 0000 0000 0000 Instruction Fields: None Timing: 2 oscillator clock cycles Memory: 1 program words MOTOROLA No Operation Assembler Syntax: 14 13 0000 DSP96002 USER’S MANUAL 0000 0000 0000 A - 283...

  • Page 472

    Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words A - 284 Logical Complement Assembler Syntax: ( See the MOVE instruction description.) ( See the MOVE instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0010 uu01 1ddd MOTOROLA...

  • Page 473

    Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA Assembler Syntax: ( See the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss uu01 1ddd A - 285...

  • Page 474

    Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words A - 286 Assembler Syntax: ( See the MOVE instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 0sss 1001 1ddd MOTOROLA...

  • Page 475

    SNAN -Set if bit 5 of the immediate operand is set. Not affected otherwise. -Set if bit 6 of the immediate operand is set. Not affected otherwise. UNCC -Set if bit 7 of the immediate operand is set. Not affected otherwise. MOTOROLA Assembler Syntax: OR(I) #Mask,D DSP96002 USER’S MANUAL A - 287...

  • Page 476

    0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 Timing: 2 + mv oscillator clock cycles Memory: 1 program words A - 288 14 13 i i i i DSP96002 USER’S MANUAL 00ff 1111 10EE MOTOROLA...

  • Page 477

    If the system stack register SSH is specified as a source operand, the system stack pointer SP is postdec- remented by 1 after SSH is read. CCR Condition Codes: Not affected. ER Status Bits: Not affected. IER Flags: Not affected. MOTOROLA Assembler Syntax: X: ea Y: ea #Count DSP96002 USER’S MANUAL A - 289...

  • Page 478

    A - 290 14 13 i i i i 14 13 0000 X: ea Y: ea 14 13 MMMR DSP96002 USER’S MANUAL i i i i 1 i i i i i i i 0000 1ddd dddd 0000 1000 0000...

  • Page 479

    1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Timing: 4 + mv oscillator clock cycles Memory: 1 program words MOTOROLA where nnn = 0-7 DSP96002 USER’S MANUAL A - 291...

  • Page 480

    IER Flags: Not affected. Instruction Format: RESET 0000 0000 0000 Instruction Fields: None Timing: 4 oscillator clock cycles Memory: 1 program words A - 292 the Interrupt Priority Register. Assembler Syntax: RESET 14 13 0000 DSP96002 USER’S MANUAL 0000 0000 0100 MOTOROLA...

  • Page 481

    Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA Rotate Left ( See the MOVE instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL (parallel data bus move) 0011 uu01 1ddd A - 293...

  • Page 482

    Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words A - 294 Rotate Right ( See the MOVE instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL (parallel data bus move) 0011 uu01 1ddd MOTOROLA...

  • Page 483

    -Set according to value pulled from stack. SUNF -Set according to value pulled from stack. SOVF -Set according to value pulled from stack. SIOP -Set according to value pulled from stack. MOTOROLA Assembler Syntax: DSP96002 USER’S MANUAL A - 295...

  • Page 484

    PC; SSL SR; SP – 1 A - 296 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 485

    Instruction Format: RTI 14 13 0000 0000 0000 0000 0000 0000 1100 Instruction Fields: None. Timing: 4 + rx oscillator clock cycles Memory: 1 program words MOTOROLA DSP96002 USER’S MANUAL A - 297...

  • Page 486

    -Set according to value pulled from stack. SUNF -Set according to value pulled from stack. SOVF -Set according to value pulled from stack. SIOP -Set according to value pulled from stack. A - 298 Assembler Syntax: DSP96002 USER’S MANUAL MOTOROLA...

  • Page 487

    Instruction Format: RTR 14 13 0000 0000 0000 0000 0000 0000 1000 Instruction Fields: None. Timing: 4 + rx oscillator clock cycles Memory: 1 program words MOTOROLA DSP96002 USER’S MANUAL A - 299...

  • Page 488

    ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: RTS 0000 0000 0000 Instruction Fields: None. Timing: 4 + rx oscillator clock cycles Memory: 1 program words A - 300 Assembler Syntax: 14 13 0000 DSP96002 USER’S MANUAL 0000 0000 1101 MOTOROLA...

  • Page 489

    Memory: 1 + mv program words MOTOROLA Assembler Syntax: SETW (move syntax - see the Move instruction description.) (move syntax - see the Move instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL SETW 0uuu 1001 1ddd A - 301...

  • Page 490

    A - 302 Assembler Syntax: SPLIT (move syntax - see the Move instruction de- scription.) (move syntax - see the Move instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL SPLIT 0sss 1011 0ddd MOTOROLA...

  • Page 491

    Memory: 1 + mv program words MOTOROLA Assembler Syntax: SPLITB S,D (move syntax - see the Move instruction de- scription.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL SPLITB 0sss 1011 1ddd A - 303...

  • Page 492

    The interrupt will be serviced after an internal delay (see the DSP96002 Technical Data Sheet (DSP96002/D) for details). The processor will resume program execution at the instruction following the STOP instruction that caused the entry into the STOP state after the interrupt has been serviced or if no interrupt was pending immediately after the delay.

  • Page 493

    Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA Subtract Assembler Syntax: (move syntax - see the Move instruction de- scription.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss uu00 1ddd A - 305...

  • Page 494

    Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words A - 306 Assembler Syntax: SUBC (move syntax - see the Move instruction de- scription.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL SUBC 1sss uu10 1ddd MOTOROLA...

  • Page 495

    Memory: 1 + mv program words MOTOROLA Assembler Syntax: (move syntax - see the Move instruction de- scription.) (move syntax - see the Move instruction description.) 14 13 where nnn = 0-7 where nnn = 0-7 DSP96002 USER’S MANUAL 1sss uu01 1ddd A - 307...

  • Page 496

    Z v (N && V) = 1 Z v C = 1 N && V = 1 N = 1 Z = 0 N = 0 V = 0 V = 1 n.a. 14 13 0000 DSP96002 USER’S MANUAL TRAPcc cccc 0000 0011 MOTOROLA...

  • Page 497

    1 1 0 0 0 1 1 0 0 1 CS(LO) 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 DSP96002 USER’S MANUAL A - 309...

  • Page 498

    Memory: 1 + mv program words A - 310 Test an Operand Assembler Syntax: (move syntax - see the Move instruction description.) (move syntax - see the Move instruction description.) 14 13 where nnn = 0-7 DSP96002 USER’S MANUAL 0110 uu01 1ddd MOTOROLA...

  • Page 499

    G circuits remain active during the WAIT state. The WAIT state is a low-power standby mode. The processor always leaves the WAIT state in the T2 clock phase (see the DSP96002 Ad- vance Information Data Sheet (DSP96002/D)). Therefore, multiple processors may be synchronized by having them all enter the WAIT state and then interrupting them with a common interrupt.

  • Page 500

    0dddddd – for all combinations where dddddd specifies the same destination as the Data ALU operation. A - 312 X: ea, D3 Y: ea, D3 – X is the inversion of the MSB of the XXX field. – Y is the inversion of the MSB of the YYY field. DSP96002 USER’S MANUAL MOTOROLA...

  • Page 501

    6 + jx 1 + ea 4 + mvb 1 + ea 4 + mvb 1 + mv 2 + mv 1 + ea 6 + jx 8 + jx 8 + jx Words Cycles DSP96002 USER’S MANUAL A - 313...

  • Page 502

    1 + mv 2+mv+da 1 + mv 2+mv+da 1 + mv 2+mv+da 1 + mv 2+mv+da 2 + da 2 + da 1 + mv 2+mv+da 1 + mv 2+mv+da 1 + ea 6 + jx Words Cycles DSP96002 USER’S MANUAL MOTOROLA...

  • Page 503

    1 + mv 2+mv+da 2 + da 2 + da 1 + mv 2 + mv 1 + mv 2+mv+da 1 + mv 2+mv+da 1 + mv 2+mv+da 1 + mv 2+mv+da Words Cycles DSP96002 USER’S MANUAL A - 315...

  • Page 504

    1 + mv 2 + mv 1 + mv 2 + mv 1 + mv 2 + mv 4 + mv 1 + mv 2 + mv 1 + mv 2 + mv 4 + rx Words Cycles DSP96002 USER’S MANUAL MOTOROLA...

  • Page 505

    1 + mv 2 + mv 1 + mv 2 + mv cycles to execute when an internal interrupt is pending during the execution of the WAIT in- struction. +da Cycles DSP96002 USER’S MANUAL Note 1 Note 2 A - 317...

  • Page 506

    Worst case: res=1, den=4 Worst case: res=3, den=4 Worst case: res=1, den=4 Worst case: res=2, den=4 Worst case: res=1, den=4 Worst case: res=1, den=2 Worst case: res=1, den=2 Worst case: res=1, den=1 DSP96002 USER’S MANUAL den=1 den=2 den=2 den=2 den=2 den=2 den=2...

  • Page 507

    Worst case: res=1, den=1 Worst case: Worst case: Worst case: daff daff Worst case: Worst case: Worst case: Worst case: source operands with U-tag set. DSP96002 USER’S MANUAL den=1 den=2 den=1 den=1 den=1 den=1 den=1 den=1 den=1 A - 319...

  • Page 508

    A - 320 source operands with U-tag set. + mv + mv Words Cycles ea + ax ea + ax ea + ay ea + ay ea + axy DSP96002 USER’S MANUAL Comments Note 1 Note 1 Note 1 Note 1 MOTOROLA...

  • Page 509

    DATA read or write and does not refer to instruction fetches. MOTOROLA + mvc Cycles Register Register ea + ax Register ea + ay + mvm Cycles Register ea + ap DSP96002 USER’S MANUAL Comments Note 1 Note 1 Comments A - 321...

  • Page 510

    Abs. Short Mem. Abs. Short Mem. 2 + ea + ax Abs. Short Mem. 2 + ea + ay Abs. Short Mem. 4 + ea + ap DSP96002 USER’S MANUAL Comments Note 1 Note 1 Comments Note 1 Note 1...

  • Page 511

    + (2 * ax) where Bxxx = BCHG, BCLR or BSET ea + (2 * ay) where Bxxx = BCHG, BCLR or BSET ea + ax ea + ay DSP96002 USER’S MANUAL Comments + lr Cycles A - 323...

  • Page 512

    + ax + (2 * ap) ea + ay + (2 * ap) ea + (2 * ap) BRSET and BSSET Operation + rx cycles 2 * ap 2 * ap 2 * ap DSP96002 USER’S MANUAL + jx Cycles MOTOROLA...

  • Page 513

    Short Displacement Address Register Special Immediate Data Absolute Address Immediate Short Data Short Jump Address Absolute Short Address I/O Short Address Implicit Figure A-19 Addressing Mode Timing Summary MOTOROLA DSP96002 USER’S MANUAL + ea + ea Words Cycles A - 325...

  • Page 514

    –– –– –– –– –– –– –– –– –– –– –– –– –– –– –– –– –– DSP96002 USER’S MANUAL + ap + aio + axy Cycle Cycle Cycle –– –– –– –– –– –– –– –– –– –– ––...

  • Page 515

    BCHG/BCLR/BSET LA, LC, SSH, SSL or SP LEA to LA, LC, SSH, SSL or SP LRA to LA, LC, SSH, SSL or SP MOVEC/I/M/S to LA, LC, SSH, SSL or SP MOVEC/M/S from SSH MOTOROLA DSP96002 USER’S MANUAL A - 327...

  • Page 516

    2. MOVEC/M/P/S from SSH or SSL 1. MOVEC/I/M/S to SP 2. MOVEC/M/P/S from SSH or SSL 1. LEA to SP 2. MOVEC/M/P/S from SSH or SSL 1. LRA to SP 2. MOVEC/M/P/S from SSH or SSL A - 328 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 517

    DO, (F)TRAPcc, STOP, and WAIT may not be used in a fast interrupt routine. All PC Relative instructions (Bcc, BScc, FBcc, FBScc, BRA, BSR, BRCLR, BSCLR, BRSET, BSSET, LRA and DOR) should not be used in fast interrupt routines since the resulting PC Relative address cannot be predicted. MOTOROLA DSP96002 USER’S MANUAL A - 329...

  • Page 518

    The following instructions are not allowed to follow a REP instruction: any two-word instruction (F)Bcc BRCLR BRSET (F)BScc BSCLR BSSET (F)Jcc JCLR JSET (F)JScc JSCLR JSSET STOP (F)TRAPcc WAIT A - 330 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 519

    MOTOROLA DSP96002 USER’S MANUAL A - 331...

  • Page 520

    DSP96002 STANDARD DSP BENCHMARKS Program size and instruction cycle counts for the DSP56000/1 are in parentheses on the line following the DSP96002 program size and instruction cycle count. All floating-point data ALU operations are performed using single precision operations (".s" extension on opcode) rather than in extended precision (".x"...

  • Page 521

    B.1.3 Real Update d = c + a * b move fmpy.s d4,d6,d1 move x:(r0)+,d4.s y:(r4)+,d6.s d4,d6,d0 x:(r0)+,d4.s y:(r4)+,d6.s d0.s,x:(r1)+ x:(r0),d4.s y:(r4),d6.s x:(r1),d0.s fadd.s d1.s,d0.s d0.s,x:(r2) DSP96002 USER’S MANUAL Program ICycles Words Totals: 2N+7 2N+7) Program ICycles Words - -- Totals: MOTOROLA...

  • Page 522

    MOTOROLA x:(r0)+,d4.s y:(r4)+,d6.s 1 x:(r1)+,d0.s fadd.s d1,d0 x:(r0)+,d4.s y:(r4)+,d6.s 1 x:(r1)+,d0.s d0.s,y:(r5)+ 1 m0,m4 x:input,x:(r0) x:(r0)-,d4.s y:(r4)+,d6.s x:(r0)-,d4.s y:(r4)+,d6.s fadd.s d1,d0 (r0)+ d0.s,x:output DSP96002 USER’S MANUAL Program ICycles Words Totals: 10 2N+9 2N+9) Program ICycles Words Totals: 1N+12 1N+12)

  • Page 523

    D5 = ar D6 = bi D4 = br D7 = ai x:(r0),d5.s y:(r4),d6.s d6,d5,d1 x:(r4),d4.s y:(r0),d7.s d4,d7,d2 d4,d5,d0 d6,d7,d2 fadd.s d2,d1 fsub.s d2,d0 d0.s,x:(r1) DSP96002 USER’S MANUAL Program ICycles Words Totals 2N+8 2N+9) Program ICycles Words d1.s,y:(r1) Totals:...

  • Page 524

    #N,_end fmpy d6,d7,d2 fadd.s d2,d1 fmpy.s d4,d5,d0 fmpy d6,d5,d1 fsub.s d2,d0 fmpy.s d4,d7,d2 _end MOTOROLA ar,ai br,bi x:(r0),d5.s x:(r4)+,d4.s y:(r0)+,d7.s x:(r0)+,d5.s y:(r4),d6.s x:(r4)+,d4.s d1.s,y:(r1) d0.s,x:(r1)+ DSP96002 USER’S MANUAL Program ICycles Words y:(r4),d6.s y:(r0),d7.s Totals: 4N+9 4N+9)

  • Page 525

    R4 x:(r0),d5.s y:(r4),d6.s x:(r4),d4.s y:(r0),d7.s fadd.s d2,d1 x:(r1),d0.s fadd.s d2,d1 fadd.s d2,d0 fsub.s d2,d0 d0.s,x:(r2) D6 = br D7 = bi Y Memory Organization CADDRR5 DADDR AADDR BADDR DSP96002 USER’S MANUAL Program ICycles Words y:(r1),d1.s d1.s,y:(r2) 1 Totals: MOTOROLA...

  • Page 526

    = bi d7 = ai Y Memory Organization DADDR CADDR BADDR AADDR DSP96002 USER’S MANUAL Program ICycles Words y:(r4)+,d6.s y:(r4)+,d7.s d0.s,y:(r5)+ y:(r4)+,d6.s d0.s,y:(r5)+ ------------------- Totals : 4N+12 4N+10) Program ICycles...

  • Page 527

    ( br(n-I) + jbi(n-I) ) } #aaddr,r0 #baddr,r4 x:(r0),d5.s #N,end x:(r4)+,d4.s y:(r0)+,d7.s 1 x:(r0),d5.s fsub.s d2,d0 DSP96002 USER’S MANUAL y:(r0)+,d5.s y:(r6)+,d1.s d1.s,y:(r2)+ Totals: 4N+14 5N+9) Program ICycles Words y:(r4),d6.s y:(r4),d6.s Totals: 1 1...

  • Page 528

    MOTOROLA c = a + ... + a x:(r0)+,d0.s y:(r4),d6.s x:(r0)+,d4.s d1.s,d6.s x:(r0)+,d4.s x:(r0)-,d5.s d0.s,x:(r0) fadd.s d2,d0 d0.s,x:output DSP96002 USER’S MANUAL Program ICycles Words y:(r4),d7.s Totals: 2N+8 2N+8) Program ICycles Words y:(r4)+,d6.s y:(r4)+,d6.s y:(r4)+,d6.s y:(r4),d6.s...

  • Page 529

    #n,end -x0,y0,a macr -x1,y0,a x0,y0,a x1,y0,a movep B-10 Y Memory Organization Coef. + 4N-1 Coef. x:input,a x:(r0)+,x0 y:(r4)+,y0 x:(r0)-,x1 y:(r4)+,y0 x1,x:(r0)+ y:(r4)+,y0 a,x:(r0)+ y:(r4)+,y0 x:(r0)+,x0 y:(r4)+,y0 a,x:output DSP96002 USER’S MANUAL Program ICycles Words ------------------- Totals 17 4N+16 MOTOROLA...

  • Page 530

    Bit reversed output data Coefficient lookup table +Cosine value (1/2 cycle) in X memory MOTOROLA x:input,d0.s x:(r0)+,d4.s y:(r4)+,d6.s x:(r0)+,d5.s y:(r4)+,d6.s d5.s,x:(r1)+ y:(r4)+,d6.s x:(r0)+,d4.s y:(r4)+,d6.s d0.s,x:(r1)+ y:(r4)+,d6.s fadd.s d1,d0 d0.s,x:output points,data,coef,coefsize DSP96002 USER’S MANUAL ProgramICycles Words Totals: 19 4N+18 4N+16) B-11...

  • Page 531

    (2 - 2,147,483,648, power of 2) start of data buffer start of 1/2 cycle sine/cosine table number of table points in sine/cosine table = i * points/2, i=1,2,... ar’ ai’ br’ bi’ table m0,m1 DSP96002 USER’S MANUAL (1 - 2,147,483,648) MOTOROLA...

  • Page 532

    ; This program has not been exhaustively tested and may contain errors. MOTOROLA m0,m4 m0,m5 m2,r6 d1.l,n0 x:(r6)+n6,d9.s y:,d8.s x:(r1)+,d6.s d3,d0 x:(r0),d4.s x:(r1)+,d6.s d1,d2 d0.s,x:(r4) d4.s,x:(r5) x:(r0)+n0,d7.s d2.s,y:(r5)+n5 x:(r1)+n1,d7.s d5.s,y:(r4)+n4 n0,d1.l DSP96002 USER’S MANUAL y:,d7.s y:(r5),d2.s y:(r4),d5.s y:(r1),d7.s d2.s,y:(r5)+ d5.s,y:(r4)+ y:(r0)+,d5.s y:(r1),d7.s B-13...

  • Page 533

    16 cycles external, 2.0X faster than 4 cycle Radix 2 bfy r0 = a pointer in and out r6 = a pointer in B-14 Note that a new pipelining technique is Approximately 150 program words required. Assuming internal program and DSP96002 USER’S MANUAL MOTOROLA...

  • Page 534

    MOTOROLA #points,d1.l #passes,d9.l #data,d0.l #coef,m2 #coefsize,d2.l d0.l,r0 r0,r2 d1,d0 d1.l,d8.l d1,d0 d0.l,r4 d1,d0 d0.l,r1 d0.l,r5 r0,r6 #2,n5 d2.l,n6 #-1,m0 m0,m1 m0,m4 m0,m5 m0,m6 x:(r0),d1.s x:(r1),d0.s x:(r5)-,d2.s x:(r4),d5.s d0,d2 d7,d6 d2.s,x:(r0)+ DSP96002 USER’S MANUAL y:(r5)+,d4.s y:(r4),d7.s y:(r5),d6.s y:(r6)+,d3.s B-15...

  • Page 535

    #4,d0.l d8.l,d1.l d2.l,m6 m2,r6 d1.l,n0 d1.l,n1 x:(r6)+n6,d9.s y:,d8.s x:(r1)+,d6.s fadd.s d3,d0 x:(r0),d4.s faddsub.s d4,d0 x:(r1)+,d6.s DSP96002 USER’S MANUAL y:(r1)+,d2.s d4.s,y:(r5)+n5 d2.s,y:(r4)+ d6.s,y:(r0)+ d3.s,y:(r1) y:(r4),d7.s d4.s,y:(r5)+ y:(r1),d7.s y:(r1),d7.s MOTOROLA...

  • Page 536

    #3,n0 n0,n1 n0,n4 n0,n5 x:(r6)+n6,d9.s x:(r1)+,d6.s fadd.s d3,d0 x:(r0),d4.s faddsub.s d4,d0 x:(r1)+n1,d6.s DSP96002 USER’S MANUAL y:(r0)+,d5.s y:(r1),d7.s d2.s,y:(r5)+ d5.s,y:(r4)+ y:(r0)+,d5.s y:(r1),d7.s d2.s,y:(r5)+ d5.s,y:(r4)+ y:(r0)+n0,d5.s y:(r1),d7.s d2.s,y:(r5)+n5 d5.s,y:(r4)+n4 y:,d8.s y:(r1),d7.s y:(r1),d7.s B-17...

  • Page 537

    DSP96002 USER’S MANUAL y:(r0)+,d5.s y:(r1),d7.s d2.s,y:(r5)+ y:,d8.s d5.s,y:(r4)+ y:(r0)+n0,d5.s y:(r1),d7.s d2.s,y:(r5)+n5 d5.s,y:(r4)+n4 y:,d8.s y:(r1),d7.s y:(r1),d7.s y:,d8.s y:(r0)+n0,d5.s y:(r1),d7.s d2.s,y:(r5)+n5 MOTOROLA...

  • Page 538

    (4-16384, power of 4) starting address of data buffer starting address of sinewave table size of sinewave table starting address of temporary storage area ar’,ai’ br’,bi’ cr’,ci’ dr’,di’ DSP96002 USER’S MANUAL y:,d8.s d5.s,y:(r4)+n4 B-19...

  • Page 539

    = cr,ci,dr,di pointer r5 = wi (sin) pointer B-20 n0 = butterflies per group n1 = rotation factor n2 = groups per pass n3 = rotation factor n4 = butterflies per group n5 = rotation factor DSP96002 USER’S MANUAL MOTOROLA...

  • Page 540

    MOTOROLA n6 = not used n7 = not used ;initialize butterflies per group ;initialize groups per pass ;initialize w rotation factor ;initialize linear addressing DSP96002 USER’S MANUAL ICycles Prog Word Cycle " " " " " "...

  • Page 541

    ;point at D data (dr,di) x:(r4),d0.s x:(r0),d7.s x:(r0),d1.s x:(r4)-n4,d4.s x:(r4),d4.s d2.s,x:(r2)+ y:(r4),d3.s faddsub.s d6,d3 faddsub.s d6,d0 d1.s,x:(r2)- d3.s,y:(r6) d0.s,d6.s fadd.s d0,d2 fsub.s d3,d0 x:(r2)+,d1.s y:(r6),d5.s x:(r2)-,d6.s d7.s,x:(r0)+n0 d1.s,y: d2.s,x:(r0) DSP96002 USER’S MANUAL y:(r4),d2.s y:(r0)-n0,d5.s y:(r0),d6.s y:(r1)+n1,d8.s y:(r5)+n5,d9.s d6.s,y:(r2) y:(r5)+n5,d9.s y:(r1)+n1,d8.s d0.s,y: MOTOROLA...

  • Page 542

    ;get w rotation factor d1.l,n2 ;multiply rotation factor by 4 n0,n4 ;check for 1 butterfly per group ;reset rotation factor - last pass x(n-1) x(n-2) z -1 DSP96002 USER’S MANUAL y:(r1)-n1,d8.s y:(r5)-n5,d9.s y:(r2),d4.s d2.s,y:(r4)+n4 y:(r1)-n1,d8.s y:(r5)-n5,d9.s d3.s,y: x(n-3) z -1...

  • Page 543

    Instructions executed only once (for initialization) or instructions that may be user application depen- dent are not included in the benchmark. ntaps sbuf B-24 H={h0,h1,h2,h3} (FIR filter and error) (FIR filter and error) Exact LMS Algorithm ntaps DSP96002 USER’S MANUAL MOTOROLA...

  • Page 544

    ;point to state buffer ;point to coefficient buffer ;extra pointer ;mod on pointers ;final adjustment ;adaptation constant y:xsig,d4.s d4.s,x:(r0)+ y:(r4)+,d5.s fadd.s d1,d0 x:(r0)+,d4.s x:(r0)-,d4.s y:(r4)-,d5.s y:dsig,d1.s x:(r0)+,d4.s y:(r4)+,d5.s x:(r0)+,d4.s d5.s,d0.s y:(r4)+,d5.s x:(r0)+,d4.s d0.s,y:(r5)+ x:(r0)+n0,d4.s y:(r4)-,d0.s DSP96002 USER’S MANUAL y:(r4)+,d5.s B-25...

  • Page 545

    B-26 Delayed LMS Algorithm ;Number of LMS iterations 0.01 ;Convergence factor x:$0 ;State of lms fir y:$0 ;LMS coefficients ;Signal error ;Input to system ;Desired signal p:$100 ;Set up address generators #conv_fact,d1.s d0.s,d9.s d6.s,x:(r0) DSP96002 USER’S MANUAL y:e,d0.s y:xin,d6.s MOTOROLA...

  • Page 546

    (r0)- d1,d2 FIR LATTICE FILTER z -1 DSP96002 USER’S MANUAL y:(r4)+,d7.s y:(r4)+,d5.s y:(r4)+,d7.s d2.s,y:(r5)+ y:(r4)+,d5.s d3.s,y:(r5)+ d2.s,y:(r5)+ d3.s,y:(r5)+ y:dsig,d2.s d2.s,y:e B (out) z -1 B-27...

  • Page 547

    COEFFICIENT AND STATE VARIABLE STORAGE S1 S2 S3 Sx M0=3 (mod 4) B-28 y: k1 k2 k3 M4=2 (mod 3) SINGLE SECTION t’ Z -1 s’ DSP96002 USER’S MANUAL equations: t’=s * k+t, t’ t s’=t * k+s MOTOROLA...

  • Page 548

    DSP96002 IMPLEMENTATION ;point to state variable storage ;N=number of k coefficients ;point to k coefficients ;mod for k’s ;get input d5.s,x:(r0)+ y:(r4)+,d4.s ;sv s,get k x:(r0),d0.s ;output sample DSP96002 USER’S MANUAL Program ICycles Words ----- ----- Totals: 3N+5 Program ICyc Words ;do filter...

  • Page 549

    Coefficient And State Variable Storage x: k1 k2 k3 y: s3 s2 s1 M0=2 (mod 3) S’ B-30 ALL POLE IIR LATTICE FILTER M4=2 (mod 3) SINGLE SECTION EQUATIONS: t’ t’=t-k * s s’=s+k * t’ DSP96002 USER’S MANUAL A (out) t’ t MOTOROLA...

  • Page 550

    ;point to filter states ;mod for states ;offset for state indexing ;get input sample x:(r0)-,d5.s y:(r4)+,d6.s x:(r0)-,d5.s y:(r4)-,d6.s d3.s,y:(r4)+n4 x:(r0)-,d5.s y:(r4)-,d6.s (r0)+ d3.s,y:(r4)+ d1.s,y:(r4)+ d1.s,y:datout DSP96002 USER’S MANUAL Program ICycles Words ----- ----- 3N+4 Program ICycles Words Totals: 3N+7 B-31...

  • Page 551

    B.1.19 General Lattice Filter GENERAL LATTICE (in) (out) COEFFICIENT AND STATE VARIABLE STORAGE x: k3 k2 k1 w3 w2 w1 w0 y: s4 s3 s2 s1 m0=6 (=2 * N, mod 7) m4=3 (=N, mod 4) B-32 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 552

    ;t-k * s, save prev s y:(r4)+,b ;copy t’,get s again b,y:(r4)+ ;sv scnd to 1st st a,y:(r4)+ ;save first state y:(r4)+,y0 ;get last state (r4)+ ;finish, adj pointer ;output sample DSP96002 IMPLEMENTATION DSP96002 USER’S MANUAL Program ICycles Words Totals: 12 4N+10 B-33...

  • Page 553

    ;point to filter states ;mod on filter states ;get input sample x:(r0)+,d5.s y:(r4)-,d6.s fadd.s d0,d3 fadd.s d0,d1 d6.s,d3.s x:(r0)+,d5.s y:(r4)-,d6.s fadd.s d0,d3 fadd.s d0,d1 x:(r0)+,d5.s y:(r4)+,d6.s fadd.s d2,d3 ;output sample DSP96002 USER’S MANUAL Program ICycles Words d3.s,y:(r4)+n4 d3.s,y:(r4)+ d1.s,y:(r4)+ y:(r4)+,d4.s (r4)+ Totals: 4N+12...

  • Page 554

    NORMALIZED LATTICE FILTER input output COEFFICIENT AND STATE VARIABLE STORAGE X: q2 k2 q1 k1 q0 k0 w3 w2 w1 w0 Y: sx s2 s1 s0 m0=3 * N (=9, mod 10) m4=N (=3, mod 4) MOTOROLA DSP96002 USER’S MANUAL B-35...

  • Page 555

    ;clr acc, get fst st ;do fir taps x:(r0)+,x1 y:(r4)+,y0 (r4)+ ;rnd, adj pointer ;output sample DSP96002 IMPLEMENTATION DSP96002 USER’S MANUAL EQUATIONS: t’=t * q-k * s u’=t * k+s * q t’ t output=sum (w * u’) Program ICycles...

  • Page 556

    * q-k * s fsub.s d0,d2 t t’ get q d2.s,d5.s fadd.s d1,d3 ;finish last t d3.s,y:(r4)+ ;save 2nd s d5.s,y:(r4)+ ;save 1st s y:(r4)+,d7.s ;get s fadd.s d2,d3 DSP96002 USER’S MANUAL Program ICycles Words x:(r0)+,d6.s ;fir (r4)+ ;adj r4 Totals: 5N+11 B-37...

  • Page 557

    ;[4x4] matrix pointer, Y memory ;output matrix, X memory x:(r0)+,d4.s y:(r4)+,d7.s ;a11,b11 1 x:(r0)+,d3.s y:(r4)+,d7.s ;a12,b21 1 x:(r0)+,d5.s y:(r4)+,d7.s ;a13,b31 1 d0.s,x:(r1)+ y:(r4)+,d7.s ;b32 DSP96002 USER’S MANUAL Program ICycles Words d0.s,y:(r1)+ ;save 1 d1.s,y:(r1)+ ;save 2 d2.s,y:(r1)+ ;save 3 --- ---...

  • Page 558

    ;output mat C ;array size ;do rows ;do columns ;copy start of row A ;copy start of col B ;clear sum and pipe x:(r1)+,x0 y:(r5)+n5,y0 DSP96002 USER’S MANUAL y:(r4)+,d7.s ;b23 y:(r4)+,d7.s ;b43 y:(r4)+,d7.s ;b14 y:(r4)+,d7.s ;b24 y:(r4)+,d7.s ;b44 --- --- Totals: 19...

  • Page 559

    1 move _cols move _rows At a DSP96002 clock speed of 26.66 MHz, a [10x10][10x10] can be computed in .1325 ms. B-40 ;sum x:(r1)+,x0 y:(r5)+n5,y0 (r4)+ ;finish, next column B ;save output ;next row A ;first element B...

  • Page 560

    2. Other possibilities include storing a 512x512 im- age but computing only a 511x511 result, computing a 512x512 result without boundary conditions but throwing away the pixels on the border, etc. MOTOROLA DSP96002 USER’S MANUAL B-41...

  • Page 561

    ;c(3,1) x:(r2)+,x0 y:(r4)+,y0 ;c(3,2) x:(r2)-,x0 y:(r4)+,y0 ;c(3,3) x:(r0)+,x0 y:(r4)+,y0 ;preload, get c(1,1) a,y:(r5)+ ;output image sample y:(r5)+,y1 ;adj r0,r5 w/dummy loads ;adj r2 ;preload for next pass (Kernel=10N), DSP96002 USER’S MANUAL image(n,m+2) image(n+514,m+2) Program ICycles Words +7N+12 MOTOROLA...

  • Page 562

    ;preload, get c(1,1) 1 x:(r0)+,d4.s y:(r4)+,d6.s ;get c(1,2) x:(r0)-,d4.s y:(r4)+,d5.s ;c(1,3) x:(r0)+,d4.s y:(r5)+,d7.s ;adj r0,r5 x:(r0)+,d4.s y:(r5)+,d7.s ;load,aj r5 1 (r1)+n1 (r2)+n2 x:(r0)+,d4.s (Kernel=10N), 10N 2 +8N+13 DSP96002 USER’S MANUAL Program ICycles Words d1.s,y:(r5)+ ;output ;load ---------- Totals: B-43...

  • Page 563

    21.0 / spacing between indexes is INDSPC, 5.0 in this example 2.7182818e+00 ;exp(1.0) 4.0342879e+02 ;exp(6.0) 5.9874141e+04 ;exp(11.0) 8.8861105e+06 ;exp(16.0) 1.3188157e+09 ;exp(21.0) ;value of first table index DSP96002 USER’S MANUAL ¨ known values of function ¨ indexes Program ICycles Words MOTOROLA...

  • Page 564

    ;reciprocal of index spacing ;adjust input relative to index ;reduce range and create index ;get index d1.l,r0 ;x-X(i), get ptr to table ;clear address ALU pipe ;point to Y(i) ;get Y(i) ;get Y(i+1) ;Y(i+1)-Y(i) ; * (x-X(i)) ;+Y(i) DSP96002 USER’S MANUAL Totals: B-45...

  • Page 565

    ;load desired range #rmin,d2.s ;load range min #o_range,d3.s ;load reciprocal of range ;adjust to rmin ;scale the input ;get integer part ;get fractional part ;spread out fraction to range 1 ;adjust to rmin DSP96002 USER’S MANUAL Program ICycles Words Totals: MOTOROLA...

  • Page 566

    (dividend) infinity d5 (divisor) infinity number infinity d0.l,d1.l ;shift in carry, copy input 1 ;shift up, pad with zeros ;shift down, set carry ;put numbers back together DSP96002 USER’S MANUAL Program ICycles Words Totals: Program ICycles Words B-47...

  • Page 567

    ;get 32-shift, move count d3.l,d1.h ;shift, move shift count ;shift, set carry ;or bits together ;see if shift count is zero ;yes, done d1,d1 d1,d0 DSP96002 USER’S MANUAL Program ICycles Words Program ICycles Words Totals: Program ICycles Words #32,d3.l d2,d3 d2.l,d0.h...

  • Page 568

    32 shift count, the resulting carry is the most significant bit. In both cases, the register shifted is unchanged. move #32-N,d0 MOTOROLA d0.l,d1.l ;copy input ;shift first part d0.l,d1.l ;copy input ;shift first part DSP96002 USER’S MANUAL Totals: Program ICycles Words #N,d1 d1,d0 ;merge Program ICycles Words...

  • Page 569

    In the special case of a zero shift count, the resulting carry is the least significant bit. In the special case of a 32 shift count, the resulting carry is the most significant bit. In both cases, the register shifted is unchanged. B-50 ;get 32 d1,d0 DSP96002 USER’S MANUAL d1,d0 ;merge Program ICycles Words...

  • Page 570

    2. Static bit field extraction, sign extend. #32-(foff+fsize),d0 #32-fsize,d0 Totals: MOTOROLA ;get 32 d1,d0 ;shift off upper bits ;right justify ;shift off upper bits ;right justify, sign ext 1 DSP96002 USER’S MANUAL Program ICycles Words move d0,d0 d0.l,d1.l d1,d1 ;shift ;merge bits Program...

  • Page 571

    #32,d3.l ;register size ;32-fsize d0,d0 #32,d3.l ;register size ;32-fsize d0,d0 #-1,d2.l ;get all ones mask ;keep field fsize long ;move to insertion d1,d0 DSP96002 USER’S MANUAL Program ICycles Words d1,d3 move d3.l,d0.h d0,d0 d4.h,d0.h ;shift ;right justify Program ICycles Words...

  • Page 572

    #-1,d1.l ;mask of all 1s ;make 1s size of foff 1 andc #-1,d1.l ;mask of all 1s ;make 1s size of foff 1 DSP96002 USER’S MANUAL Program ICycles Words d2,d4 d5,d5 d4.l,d5.h d5,d5 ;shift d2.l,d1.h ;invert mask ;move bits to field...

  • Page 573

    B-54 #32,d3.l ;register size ;32-fsize, get 1s mask 2 andc d2,d0 #32,d3.l ;register size ;32-fsize, get 1s mask 2 d2,d0 ------- y * y DSP96002 USER’S MANUAL Program ICycles Words move d3,d2 d1.l,d1.h d1,d2 ;align ;invert mask Program ICycles Words...

  • Page 574

    ;y/2 * (3-x * y * y) ;y * y ;x * y * y fsub.s d2,d3 d3.s,d6.s ;y/2, 3-x * y * y 1 ;y/2 * (3-x * y * y) ;x * (1/sqrt(x)) DSP96002 USER’S MANUAL Totals: Program ICycles Words Totals: B-55...

  • Page 575

    ;align divisor d2.l,divloop_fast d1,d0 ;perform test subtract d1,d0 ifhs ;if no borrow, do subtract ;mult remx2, save quo. bit (borrow) d8.l,d3.l ;flip inverted quotient d2,d0 ;clean off any remainder d2,d0 divdone ;done DSP96002 USER’S MANUAL Program ICycles Words Totals: MOTOROLA...

  • Page 576

    ;compute loop count d2,d1 d2.l,d2.h ;align divisor d2.l,remloop_fast d1,d0 ;perform test subtract d1,d0 ifhs ;if no borrow, perform subtract ;adjust remainder d2,d0 ;align remainder remdone ;done #32,remloop_slow ;same algorithm as 1st routine d1,d2 d1,d2 ifhs d2,d0 DSP96002 USER’S MANUAL B-57...

  • Page 577

    ;check sign of result iflt ;negate if needed iflt d1.l,d2.l d0,d2 d2.l,d1.m d1,d0 d0.l,d2.m d0,d0 iflo divdone d0,d0 d3.l,d8.l d1,d2 d0.h,d0.l #32,d3 d2.h,d2.l d0,d2 d2.m,d0.l d2.l,d2.h d2,d3 d2,d1 d3.l,d2.h d2.l,divloop_fast d1,d0 d1,d0 ifhs DSP96002 USER’S MANUAL Program ICycles Words Totals: MOTOROLA...

  • Page 578

    A (accept) bit of the CCR will be set. Single point accept/reject for plotting is useful for plotting of sto- chastic images such as fractals. MOTOROLA d8.l,d3.l d2,d0 d2,d0 d1.m,d2.l ifmi d0.l,d2.l d0.l,d1.m d1,d2 d2.l,d2.m divdone d2,d0 d1,d2 d0.h,d0.l d2.h,d2.l d0,d2 d2.m,d0.l d2.l,d2.h d2,d1 d2.l,d2.h d2.l,remloop_fast d1,d0 d1,d0 ifhs d2,d0 d1.m,d2.l ifmi DSP96002 USER’S MANUAL B-59...

  • Page 579

    = unused d3 = unused d7 = unused Memory Map: B-60 Y Memory ;set accept bit y:(r0)+,d4.s ;get window minimum y:(r0)+,d4.s ;x-Xmin y:(r0)+,d4.s ;Xmax-x y:(r0)+,d4,s ;y-Ymin y:(r0)+,d4.s ;Ymax-y y:(r0)+,d4.s ;z-Zmin ;Zmax-z DSP96002 USER’S MANUAL Program ICycles Words Totals: MOTOROLA...

  • Page 580

    X Memory (n0=3) r0 Xmax Ymin Ymax Zmin Zmax MOTOROLA Y Memory Xmin DSP96002 USER’S MANUAL B-61...

  • Page 581

    ;Xmax-x0, y0,Ymin 1 x:(r0)-n0,d0.l y:(r4)+,d1.l ;y1-Ymin, Ymax x:(r0)+,d0.l x:(r0)+n0,d0.l y:(r4)+,d1.l ;Ymax-y0, z0,Zmin 1 x:(r0)-n0,d0.l y:(r4)+,d1.l ;z1-Zmin, Zmax x:(r0),d0.l DSP96002 USER’S MANUAL Program ICycles Words ;x0-Xmin, get x1 ;Xmax-x1, get x0 ;y0-Ymin, get y1 ;Ymax-y1, get y0 ;z0-Zmin, get z1 ;Zmax-z1, get z0...

  • Page 582

    Y Memory Xmin Xmax Ymin Ymax Zmin Zmax ;set accept/reject/overflow bits y:(r4)+,d1.s ;x3-Xmin, Xmax y:(r4)+,d1.s ;y3-Ymin, ymax DSP96002 USER’S MANUAL Program ICycles Words ;x0-Xmin, get x1 ;x1-Xmin, get x2 ;x2-Xmin, get x3 ;Xmax-x3, get x2 ;Xmax-x2, get x1 ;Xmax-x1, get x0 ;y0-Ymin, get y1...

  • Page 583

    ;d0-Dmin, get d1 ;d1-Dmin, get d2 ;d2-Dmin, get d3 y:(r4)+,d1.s ;d3-Dmin, Dmax ;Dmax-x3, get d2 ;Dmax-x2, get d1 ;Dmax-x1, get d0 DSP96002 USER’S MANUAL ;Ymax-y1, get y0 ;z0-Zmin, get z1 ;z1-Zmin, get z2 ;z2-Zmin, get z3 ;Zmax-z3, get z2 ;Zmax-z2, get z1 ;Zmax-z1, get z0...

  • Page 584

    ;/ * section 3 B0 * / ;/ * section 3 B1 * / ;/ * section 3 A1 * / ;/ * section 3 B2 * / ;/ * section 3 A2 * / DSP96002 USER’S MANUAL Program ICycles Words B-65...

  • Page 585

    Intensity of ambient light Ambient reflection constant 0<= Ka <= 1.0 B-66 ;get b0 fadd.s d1,d2 x:(r0)+,d4.s fadd.s d5,d0 x:(r0)+,d4.s fadd.s d6,d1 x:(r0)+,d4.s fadd.s d2,d1 x:(r0)+,d4.s x:(r0)+,d4.s fadd.s d1,d2 DSP96002 USER’S MANUAL y:(r4),d5.s y:(r5),d6.s d2.s,y:(r5)+ d0.s,d7.s d1.s,y:(r4)+ Totals: 5N+6 MOTOROLA...

  • Page 586

    The value of this term is found by using a 256 element lookup table with 256.0(R * V) as an index. The value of n is an arbitrary term that is fixed for the algorithm and depends on empirical conditions. X memory ktbl 256.0 address of spctbl MOTOROLA Y memory DSP96002 USER’S MANUAL B-67...

  • Page 587

    ;get seed #69069,d1.l ;get constant ;multiply ; +1 d0.l,x:seed ;mod 2 ** 32, new seed 2 DSP96002 USER’S MANUAL Program ICycles Words Totals: 20 Program ICycles Words Totals: MOTOROLA...

  • Page 588

    ** 3 * (P1X) + 3t(t-1) ** 2 * (P2x) - 3t * t(1-t) * (P3x) + t ** 3 * (P4x) x(t)=(t-1)(-(t-1) ** 2 * (P1x)+3t{(t-1) * (P2x)-t * (P3x)}) + t ** 3 * (P4x) Memory Map: The P coefficients are accessed in the order: P3x,P2x,P1x,P4x. MOTOROLA DSP96002 USER’S MANUAL B-69...

  • Page 589

    The following packs four 8 bit bytes into a single 32 bit word. The bytes to be packed are right justified in four separate registers: d0 = xxxA d1 = xxxB B-70 x:(r0)-,d4.s x:(r4)+,d0.s y:,d5.s x:(r0)-,d4.s d0.s,d5.s x:(r0)+n0,d4.s d5.s,d4.s x:(r0)+n0,d5.s d2 = xxxC d3 = xxxD DSP96002 USER’S MANUAL Program ICycles Words y:(r4)-,d4.s 1 Totals: MOTOROLA...

  • Page 590

    ;d3 = ABCD ;d1 = YZ #data,d3.l ;get data ;d1=ssAB, d3=ABCD ;d0=sssA, d1=ssAB ;d1=sssB ;d2=sssC ;d3=sssD #data,d0.l ;get data ;d1=sX, d0=XY ;d1=sY DSP96002 USER’S MANUAL Program ICycles Words Totals: Program ICycles Words T o tals: Program ICycles Words Totals: Program...

  • Page 591

    Note that the source data starts at the lsb of the first word whereas the destination starts at an arbitrary offset from the lsb. B-72 x:(r0)+,d2.s fadd.x d2,d1 DSP96002 USER’S MANUAL ; s, t ; c1 ; c(n)*s, c(n+1) ; c(n)*t, c(n)*s+c(n+1) ;...

  • Page 592

    ;save new dest field y:(r1),d5.l ;shift old bits, get dest bits ;shift dest bits ;shift dest bits back ;part of dest with source bits d5.l,y:(r1) ;save new destination bits DSP96002 USER’S MANUAL Program ICycles Words Totals: 24 4N+20 B-73...

  • Page 593

    ;shift old bits, get dest bits ;shift dest bits ;shift dest bits back ;part of dest with source bits d5.l,y:(r1) ;save new destination bits DSP96002 USER’S MANUAL Program ICycles Words Totals: 6N+27 MOTOROLA...

  • Page 594

    = W X Y Z 64x64 Bit Unsigned Multiply d3:d7:d6:d4 = d0:d1 * d2:d3 mpyu d0,d2,d7 mpyu d0,d3,d5 mpyu d1,d3,d4 mpyu d1,d2,d6 move d0,d5 addc d1,d2 d5,d6 addc d2,d7 MOTOROLA d7.h,d3.l d4.h,d0.l d6.h,d2.l d5.h,d1.l ifcs ifcs DSP96002 USER’S MANUAL Program ICycles Words Totals: B-75...

  • Page 595

    = y1 (dy) d7 = y0 and yScreen B-76 #2.0,d4.s #2.0,d4.s d4.s,d3.s fsub.s d1,d3 d4 = temporary x1 d8 = d5 = temporary y1 d9 = 2.0 DSP96002 USER’S MANUAL Program ICycles Words Totals: Program ICycles Words Totals: MOTOROLA...

  • Page 596

    _draw_point _end_y _draw1_y int d6 _draw_point MOTOROLA d2.s,d4.s d3.s,d5.s d2.s,d0.s fflt fflt d3.s,d1.s iflt d9.s,d2.s d2.s,d4.s d6.s,d2.s d6 = x0 d7 = y0 d2.s,d6.s DSP96002 USER’S MANUAL Program ICycles Words application dependent application dependent application dependent B-77...

  • Page 597

    Performance: Trivial case: (single point) 16 Other cases: B-78 d3.s,d0.s fflt fflt d2.s,d1.s iflt _draw1_x d9.s,d2.s d2.s,d4.s d7.s,d2.s d6 = x0 d7 = y0 d2.s,d7.s cycles 25 + 3n cycles DSP96002 USER’S MANUAL application dependent application dependent application dependent MOTOROLA...

  • Page 598

    ; Increment y case ; If dy is negative, switch endpoints and sign of dx and dy _inc_y d4,d6 d5,d7 MOTOROLA d4 = d5 = d6 = x0 d7 = y0 d2.l,d4.l d3.l,d5.l d2.l,d0.l iflt d3.l,d1.l iflt iflt iflt DSP96002 USER’S MANUAL B-79...

  • Page 599

    ; Set up registers _set_y_xn move move move ; Draw first point _draw_point ; Draw additional points d4.l,_line_y_xn d5,d2 B-80 iflt iflt d1.l,d2.l d2.l,d4.l d1.l,r0 d2.l,m0 d0.l,n0 d0.l,d5.l r0,d2.l (r0)+n0 ifge d1.l,d2.l d2.l,d4.l d1.l,r0 d2.l,m0 d0.l,n0 d0.l,d5.l r0,d2.l (r0)+n0 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 600

    _draw_point ; Draw additional points d4.l,_line_x_yp d5,d2 d4,d2 _draw_point _line_x_yp ; Increment x, dy negative case ; Set up registers _set_x_yn MOTOROLA ifge iflt iflt iflt iflt d0.l,d2.l d2.l,d4.l d0.l,r0 d2.l,m0 d1.l,n0 d1.l,d5.l r0,d2.l (r0)+n0 ifge DSP96002 USER’S MANUAL B-81...

  • Page 601

    _draw_point move B.1.44 Wire-Frame Graphics Rendering WIRE-FRAME RENDITION OF A THREE DIMENSIONAL POLYLINE ON THE MOTOROLA DSP96002 Version 1.00 OVERVIEW This program displays a three dimensional polyline in two dimensions. The points of the polyline, as defined in the input list, are projected into two dimensions using the perspective transformation. The projected points are output to a display list that can be drawn by a graphics engine or a fast drawing program.

  • Page 602

    Reject double clip line rejected Minimum (two single planes) Maximum (six planes) The DSP96002 has an instruction cycle time of 74ns and will transform 347K points/sec in the accept loop. In the reject loop, 365K points can be rejected each second. INPUT Before calling the polyline generator, address register r1 should point to the area in X memory which con- tains the X, Y and Z coordinates of the input points.

  • Page 603

    Polygon2: X1,Y1 X2,Y2 PolygonM: Xn,Yn -2.0 All coordinates are in IEEE single-precision floating-point format to speed up the DSP96002 floating-point incremental line drawing algorithm. ADDRESS REGISTER USAGE Four address registers are used: input list temporary coordinates transformation matrix, scale and offset for 2D transformation...

  • Page 604

    Xold Zold Yold Wold Matrix1,1 Matrix4,1 Matrix2,1 Matrix3,1 Matrix1,2 Matrix4,2 Matrix2,2 Matrix3,2 Matrix1,3 Matrix4,3 Matrix2,3 Matrix3,3 Matrix1,4 Matrix4,4 Matrix2,4 Matrix3,4 Xscale Xoffset Yscale Yoffset Xout0 Yout0 n5=-1.0 Xout1 Yout1 TempCount TOld,Xtemp ¨ r6 Ytemp Wtemp DSP96002 USER’S MANUAL (temporaries) B-85...

  • Page 605

    Suppose that the line between points P1 and P2 was rejected because the x coordinate of P2, x2, was larger than w2. Then, y2 = y1 + t (y2 - y1) where --------------------- (w1 - x1) - (w2 - x2) B-86 w1 - x1 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 606

    If the line is not trivially rejected, a check is made to determine if the current point is accepted. If so, control is transferred to the reject loop single point clip routine. Otherwise the double point routine is entered. REJECT LOOP SINGLE POINT CLIPPING CODE MOTOROLA DSP96002 USER’S MANUAL B-87...

  • Page 607

    {1} William M. Newman and Robert F. Sproull, Principles of Interactive Computer Graphics, (New York: McGraw-Hill, 1979). ; WIRE-FRAME RENDITION OF A THREE DIMENSIONAL POLYLINE Version 1.00 ;--------------------------------------------------------- ;--------------------------------------------------------- ; Transform to clip space B-88 ON THE MOTOROLA DSP96002 18-Nov-88 First point DSP96002 USER’S MANUAL MOTOROLA...

  • Page 608

    MOTOROLA x:(r0)+,d0.s x:(r0)+,d5.s x:(r4)+,d3.s fadd.s d3,d1 x:(r1)+,d0.s d1.s,d2.s x:(r1)-,d5.s n0,d4.s d9.s,d4.s fsub.s d1,d4 d4.s,d3.s x:(r4)+,d4.s DSP96002 USER’S MANUAL Words ICycles y:(r4)+,d4.s ;Y M11 1 y:,d4.s ;M41 M21 1 y:(r4)+,d4.s ;Z M31 1 y:,d4.s ;M42,M22 1 y:(r4)+,d4.s ; M32 1 y:(r4)+,d4.s ;Xo...

  • Page 609

    B-90 x:(r4)+,d4.s fadd.s d6,d3 x:(r0)+,d0.s Accept loop x:(r0)+,d5.s x:(r4)+,d3.s fadd.s d3,d1 x:(r1)+,d0.s DSP96002 USER’S MANUAL y:,d6.s d2.s,y:(r5)+ ; d3.s,y:(r5)+ ; y:(r4)+,d4.s ;Y M11 1 y:,d4.s ;M41 M21 1 y:(r4)+,d4.s ;Z M31 1 y:(r4)+,d4.s ;...

  • Page 610

    _accept_loop _end MOTOROLA d1.s,d2.s x:(r1)-,d5.s n0,d4.s d7.l,x:(r6) d6.s,d7.s d9.s,d4.s fsub.s d1,d4 d4.s,d3.s d0.s,x:(r1)+ x:(r4)+,d4.s x:(r4)+,d4.s fadd.s d6,d3 x:(r0)+,d0.s DSP96002 USER’S MANUAL d2.s,y:(r1) y:(r1)-,d6.s ; d2.s,y:(r1)- ; d7.s,y: y:,d3.s y:,d6.s d2.s,y:(r5)+ ; d3.s,y:(r5)+ ; B-91...

  • Page 611

    ; Multiply coordinates by 1/W, scale and add offset fmpy.s d0,d4,d2 B-92 d2.s,d1.s d1.s,d2.s d2.s,d1.s d1.s,d2.s d2.s,d1.s d9.s,d4.s fsub.s d1,d4 d4.s,d3.s x:(r1)+n1,d2.s y:,d7.s x:(r4)+,d4.s x:(r1)+n1,d0.s y:,d7.s DSP96002 USER’S MANUAL y:(r1)+n1,d2.s ; r1+2 1 d7.s,y: y:,d3.s MOTOROLA...

  • Page 612

    ; Determine trivial rejection MOTOROLA x:(r4)+,d4.s x:(r6),d7.l fadd.s d6,d3 x:(r0)+,d0.s Reject loop x:(r0)+,d0.s x:(r0)+,d5.s x:(r4)+,d3.s fadd.s d3,d1 DSP96002 USER’S MANUAL y:,d6.s ;Cnt d2.s,y:(r5)+ ;X d3.s,y:(r5)+ ; n5,y:(r5)+ -1.0 1 d2.s,y:(r1)+ ; y:(r4)+n4,d4.s ;X r4+2 1 y:(r4)+,d4.s M11 1 y:,d4.s...

  • Page 613

    #$80,ccr fcmp d1,d0 fcmp d1,d3 fcmp d4,d2 B-94 d1.s,d5.s x:(r1)+n1,d6.s d2.s,d4.s x:(r1)-,d0.s (r4)+n4 x:(r1)+n1,d6.s x:(r1)+,d3.s y:(r1)+n1,d6.s ;Zo y:(r1)+n1,d2.s ;Zn n0,d4.s d0.s,x:(r1)+ d3.s,x:(r1)+ x:(r0)+,d0.s (r1)- DSP96002 USER’S MANUAL y:(r1)-,d2.s ; ;r4+2 d2.s,y: ;Xo Zo d5.s,y: ;Yo Wo ;r1- d5.s,y:(r1)+ ; MOTOROLA...

  • Page 614

    ; Calculate reciprocal 1/W (old point) fseedd d1,d6 fmpy.s d1,d6,d1 fmpy.s d1,d4,d1 fmpy d6,d4,d1 fsub.s d1,d3 fmpy.s d1,d3,d1 MOTOROLA x:(r1)+,d0.s x:(r1)+n1,d5.s y:,d2.s d7.l,x:(r6) d2.s,d1.s d1.s,d2.s d2.s,d1.s d1.s,d2.s d2.s,d1.s d9.s,d4.s fsub.s d1,d4 x:(r4)+,d4.s DSP96002 USER’S MANUAL y:,d6.s ;Cnt d4.s,d3.s (r4)-n4 r4-2 1 y:,d3.s B-95...

  • Page 615

    _accept_loop _end B-96 x:(r4)-,d4.s y:,d6.s fadd.s d6,d3 d9.s,d4.s fsub.s d1,d4 d4.s,d3.s x:(r1)+n1,d0.s y:,d2.s x:(r4)+,d4.s x:(r1)+n1,d5.s x:(r4)+,d4.s x:(r0)+,d0.s fadd.s d5,d3 x:(r6),d7.l DSP96002 USER’S MANUAL d2.s,y:(r5)+ y:(r1)+n1,d2.s ; d3.s,y:(r5)+ d2.s,y:(r1)+ ; d2.s,y: y:,d3.s y:,d6.s d2.s,y:(r5)+ ;X ;Cnt d3.s,y:(r5)+ ; MOTOROLA...

  • Page 616

    DSP96002 USER’S MANUAL y:(r1)+,d1.l ;Cnt r1+ 1 y:(r1)-,d1.s ; y:(r1)+n1,d5.s ;Zo d7.s,y:(r6) y:(r1),d1.s B-97...

  • Page 617

    ;Yo d2.s,d0.s fadd.s d3,d2 fsub.s d3,d6 d2.s,d7.s DSP96002 USER’S MANUAL y:(r1)+n1,d5.s ;Zn Xnd 1 y:(r1)+n1,d6.s ; y:(r1)+n1,d3.s ; d1.s,y:(r6)+ ;Ynd y:(r1)+n1,d4.s ; MOTOROLA...

  • Page 618

    ; Multiply coordinates by 1/W, scale and add offset (old point) MOTOROLA fadd.s d3,d2 d9.s,d4.s fsub.s d1,d4 d4.s,d3.s x:(r4)+,d4.s x:(r4)-,d4.s y:,d6.s fadd.s d6,d3 d9.s,d4.s fsub.s d1,d4 d4.s,d3.s x:(r4)+,d4.s DSP96002 USER’S MANUAL d4.s,y:(r1)+ d1.s,y:(r6) ;Wnd (r4)-n4 r4-2 1 y:,d3.s y:(r1)+n1,d4.s ; d4.s,y:(r1)+n1 ; d2.s,y:(r5)+ y:(r6)-,d1.s Wnd 1 d3.s,y:(r5)+...

  • Page 619

    _end1 move move B-100 x:(r4)+,d4.s x:(r6),d7.l fadd.s d6,d3 x:(r0)+,d0.s x:(r6),d7.l x:(r1)+n1,d0.s y:,d1.s d0.s,x:(r1)- x:(r1)+n1,d0.s y:,d1.s d0.s,x:(r1)+ x:(r0)+,d0.s n5,d0.s (r5)- (r5)+ #-2.0,d0.s DSP96002 USER’S MANUAL y:,d6.s d2.s,y:(r5)+ ;X d3.s,y:(r5)+ ; n5,y:(r5)+ -1.0 1 d1.s,y: d1.s,y: ;-1.0 y:(r5),d1.s d0.s,y:(r5)+ ; MOTOROLA...

  • Page 620

    MOTOROLA x:(r1)+,d0.s fsub.s d0,d4 x:(r1)-,d0.s d2.s,d5.s fsub.s d2,d3 d1.s,d0.s d3.s,d6.s x:(r1)+,d0.s fadd.s d0,d4 x:(r1)-,d0.s d1.s,d5.s fsub.s d1,d3 d2.s,d0.s d3.s,d6.s DSP96002 USER’S MANUAL y:(r1)-,d4.s ;W1 d2.s,d7.s y:(r1)+,d4.s ;Z1 y:(r1)-,d4.s ;W1 d1.s,d7.s y:(r1)+,d4.s ;Z1 B-101...

  • Page 621

    ; Clip at z = w boundary _clip1_zp move B-102 x:(r1)-,d5.s fsub.s d5,d4 x:(r1),d5.s d2.s,d0.s fsub.s d2,d3 d1.s,d5.s d3.s,d6.s x:(r1)-,d5.s fadd.s d5,d4 x:(r1),d5.s d1.s,d0.s fsub.s d1,d3 d2.s,d5.s d3.s,d6.s DSP96002 USER’S MANUAL y:(r1),d4.s d2.s,d7.s y:(r1)+,d4.s ;Z1 y:(r1),d4.s d1.s,d7.s y:(r1)+,d4.s ;Z1 y:(r1)-,d4.s ;W1 MOTOROLA...

  • Page 622

    ;--------------------------------------------------------- Double point clipping routines ;--------------------------------------------------------- ; XOld = WOld boundary _clip2_xop move MOTOROLA d2.s,d7.s fsub.s d6,d4 x:(r1)+,d6.s d2.s,d0.s fsub.s d2,d3 d1.s,d6.s d3.s,d5.s x:(r1)+,d7.s x:(r1),d7.s d2.s,d0.s fsub.s d3,d5 n0,d6.s (r1)+n1 DSP96002 USER’S MANUAL y:(r1),d6.s y:(r1)-,d2.s ;W1 y:(r1),d4.s B-103...

  • Page 623

    ; YOld = WOld boundary _clip2_yop move move B-104 fadd.s d3,d5 x:(r1)-,d3.s fsub.s d3,d5 d9.s,d2.s d2.s,d4.s ffgt (r1)- fsub.s d3,d6 x:(r1)+n1,d3.s d6.s,d0.s fsub.s d3,d6 d9.s,d2.s d2.s,d4.s ffgt (r1)- fadd.s d3,d5 x:(r1)+,d3.s DSP96002 USER’S MANUAL y:(r1)-,d3.s ;Wn d5.s,d0.s y:(r1)-,d3.s ;Wn y:(r1),d3.s d5.s,d0.s MOTOROLA...

  • Page 624

    ; ZOld = WOld boundary _clip2_zop move move fseedd d5,d4 MOTOROLA fsub.s d3,d5 d9.s,d2.s d2.s,d4.s ffgt (r1)+ fsub.s d3,d6 x:(r1)-,d3.s fsub.s d3,d6 d9.s,d2.s d2.s,d4.s ffgt (r1)+ fadd.s d3,d5 d5.s,d0.s fsub.s d3,d5 DSP96002 USER’S MANUAL y:(r1),d3.s d6.s,d0.s y:(r1)-,d3.s ;Wn y:(r1),d3.s B-105...

  • Page 625

    B-106 d9.s,d2.s d2.s,d4.s ffgt (r1)- fsub.s d3,d6 d6.s,d0.s d9.s,d2.s d2.s,d4.s ffgt (r1)+n1 x:(r1)-,d2.s fsub.s d2,d0 fadd.s d0,d5 d9.s,d2.s d2.s,d4.s DSP96002 USER’S MANUAL y:(r1)+,d3.s ;Zn y:(r1)-,d0.s ;Wo MOTOROLA...

  • Page 626

    MOTOROLA fflt (r1)- x:(r1)+n1,d2.s fadd.s d3,d2 fsub.s d6,d2 d2.s,d0.s d9.s,d2.s d2.s,d4.s fflt (r1)- x:(r1)+,d2.s fsub.s d2,d0 fadd.s d0,d5 d9.s,d2.s d2.s,d4.s fflt DSP96002 USER’S MANUAL y:(r1)-,d3.s ;Wo y:,d0.s B-107...

  • Page 627

    ; ZNew = 0 boundary B-108 (r1)+ x:(r1)-,d2.s fadd.s d3,d2 fsub.s d6,d2 d2.s,d0.s d9.s,d2.s d2.s,d4.s fflt (r1)+ fsub.s d2,d0 fadd.s d0,d5 d9.s,d2.s d2.s,d4.s fflt DSP96002 USER’S MANUAL y:,d3.s y:(r1)-,d0.s ;Wo y:(r1),d2.s MOTOROLA...

  • Page 628

    Execution speed for a 1024 point WHT is 1.68 milliseconds at 13.5 MIPS. page 132,60,1,1 Implements the Walsh-Hadamard Transform iord 1<<iord data MOTOROLA d6.s,d0.s fsub.s d0,d6 d6.s,d0.s d9.s,d2.s d2.s,d4.s fflt ;order of transform=log2(npoints) ;length of transform DSP96002 USER’S MANUAL y:(r1),d6.s B-109...

  • Page 629

    ;upper leg 2, point back to 1 x:(r4)-,d3.s ;lower leg 2, point back to 1 d1.s,x:(r0)+ ;save upper 1, point to 2 d0.s,x:(r4)+ ;save lower 1, point to 2 d3.s,x:(r0)+ ;save upper 2, point to next DSP96002 USER’S MANUAL MOTOROLA...

  • Page 630

    ;get upper of bfly 2 x:(r4)-,d3.s ;get lower of bfly 1, point to upper d1.s,x:(r0)+ ;save upper 1 d0.s,x:(r0)+n0 ;save lower 1, point to next group d3.s,x:(r4)+ ;save upper 2 d2.s,x:(r4)+n4 ;save lower 2, point to next group DSP96002 USER’S MANUAL ;adjust r0,r4 B-111...

  • Page 631

    ;get upper leg of bfly 1 x:(r4)+,d1.s ;get lower leg of bfly 1 x:(r0)-,d2.s ;get upper leg of bfly 2 x:(r4)+,d3.s ;get lower leg of bfly 2 d1.s,x:(r0) ;save sum 1 d0.s,y:(r0)+ ;save dif 1 d3.s,x:(r0) ;save sum 2 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 632

    ;save # bflys/stage ;get # of groups/stage n0,n4 ;multiply # groups by 2,copy offset ;save new # groups/stage ;update other pointer DSP96002 USER’S MANUAL ;upper x,y #1 ;lower x,y #1 ;upper x,y #2 ;lower x,y #2 ;save sum x,y #1 ;save dif x,y #1...

  • Page 633

    DSP96002 USER’S MANUAL ;upper x,y #1 ;lower x,1 #1 ;upper x,y #2 ;lower x,y #2 ;save upper x,y #1 ;save lower x,y #1 ;save upper x,y #2 ;save lower x,y #2 ;upper x,y #1...

  • Page 634

    ; ** 8 ; ** 7 ; ** 6 ; ** 5 ; ** 4 ; ** 3 ; ** 2 ; ** 1 ; ** 0 #polyc,r0 x:(r0)+,d1.s x:(r0)+,d1.s DSP96002 USER’S MANUAL (x) results. Various Program ICycles Words Totals: B-115...

  • Page 635

    ; ** 6 0.3357901e-02 ; ** 5 0.8940958e-02 ; ** 4 0.5558203e-01 ; ** 3 0.2402348e+00 ; ** 2 0.6931450e+00 ; ** 1 0.1000000e+01 ; ** 0 p:$100 #polyc,r0 x:(r0)+,d1.s d7.l,d7.h x:(r0)+,d1.s DSP96002 USER’S MANUAL Program ICycles Words Totals: MOTOROLA...

  • Page 636

    ;ay bx fmpy.s d6,d7,d2 MOTOROLA m0=2 (mod 3) ; set up pointers x:(r0)+,d6.s y:(r4)-,d7.s ;ax bx x:(r0)+,d6.s y:(r4)-,d7.s ;ay bz x:(r0)+,d6.s y:(r4)-,d7.s ;az by d3.s,x:(r1)+ y:(r4)-,d7.s ;cx by d1.s,x:(r1)+ DSP96002 USER’S MANUAL Program ICycles Words y:(r4)-,d7.s ; B-117...

  • Page 637

    ;bit 3, negative ifal ;do multiply w/o ccr update ffinf ;bit 4, infinity Power Function X ** Y ;initialize power ;get lsb ifcs ;multiply if bit set DSP96002 USER’S MANUAL --- --- Totals: Program ICycles Words Totals: Program ICycles Words...

  • Page 638

    ; ** 8 ; ** 7 ; ** 6 ; ** 5 ; ** 4 ; ** 3 ; ** 2 ; ** 1 ; ** 0 ; ** 8 DSP96002 USER’S MANUAL Totals: Program ICycles Words Totals: 3N+8 Program ICycles Words...

  • Page 639

    ;sum * x+coef, coef ;float exponent ;add log2(man) ;y * log2(x) #expc,r0 ;get lowest int ;get fraction part x:(r0)+,d1.s ;get lowest int d7.l,d7.h ;sum * x, move scale x:(r0)+,d1.s ;+coef, get next coef 1 ;exp2(y * log2(x)) DSP96002 USER’S MANUAL Totals: MOTOROLA...

  • Page 640

    ;/ * section ;/ * section ;/ * section ;/ * section ;/ * section ;/ * section ;/ * section DSP96002 USER’S MANUAL Program ICycles Words 1 A2 * / 1 A1 * / 1 B2 * / 1 B1 * /...

  • Page 641

    ;reduce range ;get int part #360.0,d5.s ;get frac part, spread ;spread fraction part to range ;adjust to min d6.s,d3.s ;make positive, save sign DSP96002 USER’S MANUAL y:(r4)+,d6.s 1 y:(r4)+,d6.s 1 y:(r4)+,d6.s 1 y:(r4)+,d6.s 1 y:(r4)+,d4.s 1 y:(r4)+,d6.s 1 Totals: 5N+4...

  • Page 642

    ;angle < z? get tangent fflt ;yes, rotate cw fflt ;yes, subtract angle ffge ;no, add angle for ccw ;y*tan ;x*tan, x’=x-y*tan ;y’=y+x*tan ;alp=alp/2 ;fix sign of sine Program ICycles Words ---- ------- Totals: 8N+26 DSP96002 USER’S MANUAL 8N+9 B-123...

  • Page 643

    ;flip if other quadrant #tantab,r0 ;point to tangent table #scale,d0.s ;y=0, x=scale #45.0,d6.s ;z=0,alp=45 x:(r0)+,d4.s ;angle < z? get tangent fflt ;yes, rotate cw fflt ;yes, subtract angle ffge ;no, add angle for ccw ;y*tan fsub.x d2,d0 ;x*tan, x’=x-y*tan DSP96002 USER’S MANUAL MOTOROLA...

  • Page 644

    Program ICycles Words ---- ------- Totals: 8N+27 #-180.0,d7.s ;get range min #1.0/360.0,d5.s ;adjust to min, get range ;reduce range ;get int part #360.0,d5.s ;get frac part, spread ;spread fraction part to range ;adjust to min DSP96002 USER’S MANUAL 8N+9 B-125...

  • Page 645

    ;yes, subtract angle ffge ;no, add angle for ccw ;y*tan ;x*tan, x’=x-y*tan ;y’=y+x*tan ;alp=alp/2 ;fix sign of tangent d0.s,d1.s ;exchange d0 ;d0/d1 ffinf ffinf #2.0,d2.s fsub.s d1,d2 d2.s,d3.s d2.s,d4.s fsub.s d1,d3 ;tangent Program ICycles Words 8N+9 ---- ------- DSP96002 USER’S MANUAL MOTOROLA...

  • Page 646

    .1,.2,.3,.4 dc .5,.6,.7,.8 dc .9,.1,.2,.3 dc .4,.5,.6,.7 org x:$20 cmatrix ds N_sqr org y:$0 bmatrix dc .5,.5,.5,.5 MOTOROLA Totals: 8N+37 A(1,1) ... A(1,N) A(N,1) ... A(N,N) DSP96002 USER’S MANUAL Sample data is given Program ICycles Words B-127...

  • Page 647

    For example, take the matrix A: ;Matrix A’s elements are stored as such: B-128 ; modulo N-squared addressing fadd.s d3,d1 d7.s,d3.s ; increment r4 ; increment r1 A(1,1) ... A(1,N) A(N,1) ... A(N,N) DSP96002 USER’S MANUAL Totals: n**3 +4n**2 Sample data is given. MOTOROLA...

  • Page 648

    1 fmpy d4,d6,d3 fadd.s d3,d1 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d1 x:(r0)+,d4.s y:(r5)+,d2.s MOTOROLA 15 + 4*18 = 87 instruction cycles to complete. ; modulo-N addressing x:(r0)+,d4.s y:(r4)+n4,d0.s 1 DSP96002 USER’S MANUAL Program ICycles Words ;junk into d2.s B-129...

  • Page 649

    ;matrix storage area must be equal to zero, where 2**k >= N**2. ;This routine takes 15 + 8*74 = 607 instruction cycles. B-130 fadd.s d3,d2 A(1,1) ... A(1,N) A(N,1) ... A(N,N) DSP96002 USER’S MANUAL ;junk into d0.s y:(r4)+n4,d8.s 1 Totals: 30 Sample data is given Program ICycles...

  • Page 650

    1 fmpy d4,d7,d3 fadd.s d3,d1 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d1 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d1 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 MOTOROLA ; modulo-N addressing x:(r0)+,d4.s y:(r4)+n4,d7.s 1 DSP96002 USER’S MANUAL Words B-131...

  • Page 651

    1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 move d2.s,y:(r5)+n5 d5.s,d1.s B-132 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 652

    ;k least significant bits of the address of the beginning of any ;matrix storage area must be equal to zero, where 2**k >= N**2. MOTOROLA fadd.s d3,d2 A(1,1) ... A(1,N) A(N,1) ... A(N,N) DSP96002 USER’S MANUAL ;junk to d1.s y:(r4)+n4,d7.s 1 Totals: 86 Sample data is given B-133...

  • Page 653

    .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 dc .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 dc .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 dc .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 dc .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 dc .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 dc .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 dc .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 dc .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 dc .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 dc .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 dc .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 dc .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 dc .5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5,.5 org y:$100 cmatrix ds N_sqr B-134 DSP96002 USER’S MANUAL Program ICycles Words MOTOROLA...

  • Page 654

    1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 MOTOROLA ; modulo-N addressing x:(r0)+,d4.s y:(r4)+n4,d7.s 1 DSP96002 USER’S MANUAL B-135...

  • Page 655

    1 fmpy d4,d7,d3 fadd.s d3,d1 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d1 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d1 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d1 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 B-136 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 656

    1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 MOTOROLA DSP96002 USER’S MANUAL B-137...

  • Page 657

    1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 move d2.s,y:(r5)+n5 d5.s,d1.s B-138 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 658

    1 fmpy d4,d7,d3 fadd.s d3,d1 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d1 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d1 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d1 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 MOTOROLA DSP96002 USER’S MANUAL B-139...

  • Page 659

    1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 fmpy d4,d7,d3 fadd.s d3,d2 x:(r0)+,d4.s y:(r4)+n4,d7.s 1 B-140 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 660

    Second Order Oscillator MOTOROLA fadd.s d3,d2 ;sampling frequency ;center frequency ;magnitude ;output file ;init scale factor #mag,d5.s ;init magnitudes ;do 100 points ;output signal DSP96002 USER’S MANUAL ;junk to d1.s y:(r4)+n4,d7.s 1 Totals: 286 4399 Program Icycles Words Totals: Program Icycles Words...

  • Page 661

    ;init scale factor #mag,d5.s ;init magnitudes ;generate 200 points d6.s,d4.s d4.s,d5.s ;sampling frequency ;frequency 0 ;frequency 1 ;init scale0 factor #mag0,d5.s ;init magnitude0 ;init scale1 #mag1,d1.s ;init magnitude1 d6.s,d4.s d4.s,d5.s d2.s,d0.s d0.s,d1.s DSP96002 USER’S MANUAL Totals: Program Icycles Words MOTOROLA...

  • Page 662

    In the conversion descriptions, conversions that require range checking will perform the actual range MOTOROLA ;round to nearest integer DSP96002 USER’S MANUAL Totals: Program ICycles...

  • Page 663

    B-144 ;check for in range ;if negative, error ;convert to SP float ;see if msb is set ;if set, too big d0.1 ;convert DSP96002 USER’S MANUAL Program ICycles Words Program ICycles Words Program ICycles Words Program ICycles Words MOTOROLA...

  • Page 664

    ;jump if invalid op set d1,d0 ;copy sign of d1 to d0 #31,d0.h ;clear sign bit #31,d1.h,_bitclr ;sign bit clear #31,d0.h ;set sign bit DSP96002 USER’S MANUAL Program ICycles Words Program ICycles Words Program ICycles Words Totals: Program ICycles Words...

  • Page 665

    ;change sign bit ;change sign bit ;scale d0 $ff800000 ;negative infinity d1.s,d0.s ;check input, copy ;done if nan ;done if infinity ;jump if non-zero DSP96002 USER’S MANUAL Program ICycles Words Totals: Program ICycles Words Totals: Program ICycles Words Totals: Program ICycles...

  • Page 666

    The x argument of the nextafter(x,y) must be a single precision number and not a single-extended number. This is an arithmetic function. MOTOROLA ;set -infinity result ;set DZ in ER ;set DZ in IER ;done #-126,d3.l ;get exponent ;cmp to SP exp min iflt ;limit if denorm ;convert to SP FP DSP96002 USER’S MANUAL Totals: B-147...

  • Page 667

    Either operand a NaN: X is + or - infinity: Result is normalized: Result denormalized: Result overflowed: B-148 ffun d0.s,d1.l #$7fffffff,d0.s ifcs #$00800000,d3.s ffgt fflt #$80000000,d2.l ifmi ifmi d1.l,d0.s Execution Timing in ICycles DSP96002 USER’S MANUAL Program ICycles Words _not_nan Totals: MOTOROLA...

  • Page 668

    ;set true if infinite d1=Isnan(d0) #0,d1.l ;set ccr bits ffun ;set true if NaN #0,d2.l ;set ccr bits ffgl ;set true if GL DSP96002 USER’S MANUAL Program ICycles Words Totals: Program ICycles Words Totals: Program ICycles Words Totals: B-149...

  • Page 669

    NaN -infinity negative normalized nonzero negative denormalized positive denormalized positive normalized nonzero +infinity Class(x) function applies to single precision floating-point numbers. B-150 #0,d2.l ;set ccr bits ffun ;set true if unordered DSP96002 USER’S MANUAL Program ICycles Words Totals: MOTOROLA...

  • Page 670

    ;jump if ordered ;check signaling nan bit ;quiet nan ;jump if not zero ;type is minus zero ;type is plus zero ;jump if finite ;minus infinity ;plus infinity ;see if positive ;normalized ;normalized DSP96002 USER’S MANUAL Program ICycles Words Totals: B-151...

  • Page 671

    IEEE DOUBLE PRECISION USING SOFTWARE EMULATION Note: The following programs have not been exhaustively tested and may contain errors. B.4.1 IEEE Double Precision Addition ; Double Precision IEEE floating-point Addition For The DSP96002 D0 + D1 ; Alters Data ALU Registers d0.h d0.m d1.h...

  • Page 672

    ; check min exp, a0 flag ; jump if exp0 = min exp #1,d6.l ; check min exp, a1 flag ; jump if exp1 = min exp ; jump to normalized add ; get infinity mask DSP96002 USER’S MANUAL B-153...

  • Page 673

    ; get infinity mask ; remove implied one bit ; check mant1.high = zero ; jump if a1 is a NaN ; check mant1.low = zero ; jump if a1 is infinity ; jump if a1 is a QNaN DSP96002 USER’S MANUAL MOTOROLA...

  • Page 674

    ; jump to add for ieee mode ; get denorm exponent ; get expr ; get exponent mask ; delete tags and sign d0.h,d5.l ; compare exps, get expr ; jump if not a denorm ; get mantr.high DSP96002 USER’S MANUAL B-155...

  • Page 675

    ; shift right m1.l and GRS1 ; jump if sticky bit clear ; set sticky bit ; get GR mask d7,d1 ; remove bits right of round bit ; jump if sticky = 0 ; put in sticky bit DSP96002 USER’S MANUAL MOTOROLA...

  • Page 676

    ; jump to addition for a0+,a1+ ; jump if a1 negative ; subtract for case: a0-,a1+ " ; jump if result is positive ; set result as negative ; get increment number ; get 2’s comp of result " DSP96002 USER’S MANUAL B-157...

  • Page 677

    ; jump if sticky bit = 0 ; get one mask ; set bits right of round bit ; test expr = zero _rnd ; jump if denormalized number ; decrement expr ; decrement expr copy ; shift mantr.l left DSP96002 USER’S MANUAL MOTOROLA...

  • Page 678

    ; get mantr.high ; get mantr.low ; set OVF and INX bits in IER ; set OVF and INX bits in ER ; get expr ; round toward -inf case ; set result to infinity " DSP96002 USER’S MANUAL B-159...

  • Page 679

    ; jump if round toward -infinity ; delete G bit ; check sticky and round bits ; jump if S or R bits = 1 ; no rounding required ; jump if round toward zero ; get result in d1 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 680

    ; set OVF and INX bits in IER ; set OVF and INX bits in ER ; get infinity exponent ; move mantr.high to d1 ; move expr to d1 ; end of subroutine d0.l d1.l d2.l d3.l DSP96002 USER’S MANUAL B-161...

  • Page 681

    ; check min exp, a0 flag ; jump if exp0 = min exp #1,d6.l ; check min exp, a1 flag ; jump if exp1 = min exp ; jump to normalized add ; get infinity mask DSP96002 USER’S MANUAL MOTOROLA...

  • Page 682

    ; get infinity mask ; remove implied one bit ; check mant1.high = zero ; jump if a1 is a NaN ; check mant1.low = zero ; jump if a1 is infinity ; jump if a1 is a QNaN DSP96002 USER’S MANUAL B-163...

  • Page 683

    ; jump to add for ieee mode ; get denorm exponent ; get expr ; get exponent mask ; delete tags and sign d0.h,d5.l ; compare exps, get expr ; jump if not a denorm ; get mantr.high DSP96002 USER’S MANUAL MOTOROLA...

  • Page 684

    ; shift right m1.l and GRS1 ; jump if sticky bit clear ; set sticky bit ; get GR mask d7,d1 ; remove bits right of round bit ; jump if sticky = 0 ; put in sticky bit DSP96002 USER’S MANUAL B-165...

  • Page 685

    ; jump to addition for a0+,a1+ ; jump if a1 negative ; subtract for case: a0-,a1+ " ; jump if result is positive ; set result as negative ; get increment number ; get 2’s comp of result " DSP96002 USER’S MANUAL MOTOROLA...

  • Page 686

    ; jump if sticky bit = 0 ; get one mask ; set bits right of round bit ; test expr = zero _rnd ; jump if denormalized number ; decrement expr ; decrement expr copy ; shift mantr.l left DSP96002 USER’S MANUAL B-167...

  • Page 687

    ; get mantr.high ; get mantr.low ; set OVF and INX bits in IER ; set OVF and INX bits in ER ; get expr ; round toward -inf case ; set result to infinity " DSP96002 USER’S MANUAL MOTOROLA...

  • Page 688

    ; jump if round toward -infinity ; delete G bit ; check sticky and round bits ; jump if S or R bits = 1 ; no rounding required ; jump if round toward zero ; get result in d1 DSP96002 USER’S MANUAL B-169...

  • Page 689

    ; set OVF and INX bits in IER ; set OVF and INX bits in ER ; get infinity exponent ; move mantr.high to d1 ; move expr to d1 ; end of subroutine i.fff...fl i.fff...flgrs DSP96002 USER’S MANUAL MOTOROLA...

  • Page 690

    ; Min exp for normalized double precision val ; Exp for denormalized double precision val ; Max exp (biased), indicating infs & NaNs ; Mask for sticky bit calculation ; Increment for LSB ; double precision multiplication subroutine DSP96002 USER’S MANUAL (destroyed) (destroyed) B-171...

  • Page 691

    _nan andi #$b,ccr #$10,ccr _done _chknan move #MAX,tmp2.l tmp1,tmp2 _done _nan andi #$b,ccr #$20,ccr jset #30,op.m,_done #$20,er _done endm ; ****** Reset Processor Flags ****** movec sr,d0.l move #SR_MASK,d1.l d1,d0 movec d0.l,sr B-172 op.m,tmp2.l op.m,tmp1.l ; DSP96002 USER’S MANUAL MOTOROLA...

  • Page 692

    #4,sr,_op2inf jset #5,sr,_op2nan ; ****** Extract Exponents ****** ------ Should be able to use FGETEXP here on double-extended ------ move d7.h,d0.l move #EXP_MSK,d1.l d1,d0 _ebias1 _ebias1 move #EBIAS,d1.l d1,d0 move d0.l,d0.m move d6.h,d0.l MOTOROLA d6.h,d0.l d7.h,d0.l DSP96002 USER’S MANUAL B-173...

  • Page 693

    #31,d6.m,_op1nrm _nrmop2 jset #31,d7.m,_domul move d7.m,d0.l jneq _op2nrm move d0.m,d0.l move #32,d1.l d1,d0 move d0.l,d0.m move d7.l,d7.m move #0,d7.l jset #31,d7.m,_domul _op2nrm B-174 normalize d6.m,d0.l normalize operand 2 d7.m,d0.l DSP96002 USER’S MANUAL MOTOROLA...

  • Page 694

    ; ****** Sum Partial Products ****** move #0,d1.h _addpps move #1,d1.h _addpps d0,d3 d4,d3 addc d2,d0 addc d0,d5 move #0,d0.l addc d0,d4 addc d0,d4 MOTOROLA d2.m,d0.l d3.m,d2.l d4.m,d0.l d5.m,d4.l ; At this point, d4.l = most significant 32 bits, DSP96002 USER’S MANUAL B-175...

  • Page 695

    = next most significant word, and least significant word info is in the sticky bit. ; Upper 96 bits = d4.l:d5.l:d3.l, and ; the lowest 32 bits have been ORed ; into the sticky bit. d0.m,d0.l DSP96002 USER’S MANUAL MOTOROLA...

  • Page 696

    #21,sr,_pinf jclr #31,d0.h,_endrnd _add1 _nxt jclr #21,sr,_rn _endrnd _pinf jset #31,d0.h,_endrnd _add1 jclr #10,d5.l,_endrnd jset #9,d5.l,_add1 jset #0,d1.h,_add1 jset #11,d5.l,_add1 _endrnd _add1 move #INUM,d0.l d0,d5 move #0,d0.l addc d0,d4 _den move d0.m,d0.l move d0.l,d0.m MOTOROLA DSP96002 USER’S MANUAL B-177...

  • Page 697

    #30,d4.l,_retsml jset #0,d1.h,_retsml _ret0 _nxt1 jset #21,sr,_pinf1 jclr #31,d0.h,_ret0 _retsml jset #27,sr,_ret0 move #0,d5.h move d5.h,d5.m move #$800,d5.l _putsgn _endrnd ; ****** Overflow Check ****** B-178 ; Reaches here if value is too small to denormalize. DSP96002 USER’S MANUAL MOTOROLA...

  • Page 698

    #EBIAS,d1.l d1,d0 move d0.l,d5.h jclr #31,d0.h,_done bset #31,d5.h ; ****** Exit Routine ****** _putsgn jclr #31,d0.h,_done bset #31,d5.h _done ; ****** Zero Operand Detected (or denorm in FAST mode) ****** _op2_0 depftst d6,d0,d1 MOTOROLA DSP96002 USER’S MANUAL B-179...

  • Page 699

    ; ****** Infinity Operand Detected ****** _op2inf depftst d6,d0,d1 jset #5,sr,_op1nan _operr _retinf _op1inf depftst d7,d0,d1 jset #5,sr,_op2nan _operr _retinf ; ****** NaN Operand Detected ****** _op2nan jset #13,sr,_op2sn ftfr.x d7,d5 _done _op1nan jset #13,sr,_op1sn bset #4,sr ftfr.x d6,d5 B-180 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 700

    #4,sr bset #13,sr bset #20,sr _done endsec NON-IEEE DOUBLE PRECISION USING SOFTWARE EMULATION dplib ident ; MOTOROLA DSP96002 DPLIB - VERSION 1.0 ; EXTENDED DOUBLE PRECISION floating-point SUBROUTINE LIBRARY page 132,60,1,1 ; equates sign bias $1fffffff dptemp $1fc page...

  • Page 701

    ; Input: r0 contains the lowest address of the 4-word internal extended precision number d0 contains the DSP96002 floating-point number. The DSP96002 has the following floating-point formats: SP normalized (24 bit mantissa) SP denormalized SEP normalized (32 bit mantissa) SEP denormalized (encoded as DP normalized) DP normalized ;...

  • Page 702

    ; MOTOROLA DSP96002 DPLIB - VERSION 1.0 ; DPLIB2IEEE - Convert internal double precision format to a double precision format in d0. ; Entry point: dplib2ieee: ; Input: r0 contains the lowest address of the 4-word internal extended precision number ;...

  • Page 703

    ; Alters: D0.l dp_abs d0.l move d0.l,x:(r0+sign) page ; MOTOROLA DSP96002 DPLIB - VERSION 1.0 ; DP_ADD - Add two double precision numbers. ; Entry point: dp_add: ; Input: r0 contains the lowest address of a 4-word internal extended precision number ;...

  • Page 704

    ;get bits to go from ls to ms ;include shifts from ms #0,d1.l ;decrement the exponent ;make sure the exp is valid ;add lower words ;add upper words ;test for carry ;normalize the sum ;shift ms and ls DSP96002 USER’S MANUAL B-185...

  • Page 705

    ;get bits to be shifted to ls ;shift in bits from ms to ls (c(r0) is insignificant compared to c(r1)) ;c(r0)_sign ;c(r0)_ls ;c(r0)_ms ;c(r0)_exp (c(r1) is insignificant compared to c(r0)) ;store c(r0)_ms ;store c(r0)_ls ;store c(r0) exponent DSP96002 USER’S MANUAL c(r1)_sign c(r1)_ls c(r1)_ms c(r1)_exp MOTOROLA...

  • Page 706

    ; MOTOROLA DSP96002 DPLIB - VERSION 1.0 ; DP_CLR - Set the double precision number to zero. ; Entry point: dp_clr: ; Inputs: r0 contains the lowest address of a 4-word internal extended precision number ; Outputs: r0 contains the lowest address of a 4-word internal extended precision number ;...

  • Page 707

    _same2 move x:(r0+ls),d1.l move x:(r1+ls),d2.l d2,d1 ; MOTOROLA DSP96002 DPLIB - VERSION 1.0 ;DP_COPYS-Copy sign from one double precision number to another. ; Entry point: dp_copys: ; Inputs: r0 contains the lowest address of a 4-word internal extended precision number...

  • Page 708

    ; MOTOROLA DSP96002 DPLIB - VERSION 1.0 ; DP_DIV - Divide two double precision numbers. ; Entry point: dp_div: ; Inputs: r0 contains the lowest address of a 4-word internal extended precision number r1 contains the lowest address of a 4-word internal extended precision number ;...

  • Page 709

    ; MOTOROLA DSP96002 DPLIB - VERSION 1.0 ; DP_INT - Truncate a double precision number to an integer. ; Entry point: dp_int: ; Inputs: r0 contains the lowest address of a 4-word internal extended precision number ;...

  • Page 710

    ; MOTOROLA DSP96002 DPLIB - VERSION 1.0 ; DP_MAC - Multiply two double precision numbers and accumulate the sum. ; Entry point: dp_mac: c(r0) ; Inputs: r0 contains the lowest address of a 4-word internal...

  • Page 711

    ; MOTOROLA DSP96002 DPLIB - VERSION 1.0 ; DP_MPY - Multiply two double precision numbers. ; Entry point: dp_mpy: ; Inputs: r0 contains the lowest address of a 4-word internal extended precision number...

  • Page 712

    ; MOTOROLA DSP96002 DPLIB - VERSION 1.0 ; DP_NEG - Negate the double precision number pointed to by r0. ; Entry point: dp_neg: ; Inputs: r0 contains the lowest address of a 4-word internal extended precision number ;...

  • Page 713

    ; MOTOROLA DSP96002 DPLIB - VERSION 1.0 ; DP_SQRT - Find the square root of a double precision number. ; Entry point: dp_sqrt: ; Inputs: r0 contains the lowest address of a 4-word internal extended precision number ;...

  • Page 714

    _ofl _next _sqrt move d3.l,x:(r0+ms) move d2.l,x:(r0+ls) ; MOTOROLA DSP96002 DPLIB - VERSION 1.0 ; DP_SUB - Double precision subtraction. ; Entry point: dp_sub: ; Inputs: r0 contains the lowest address of a 4-word internal extended precision number r1 contains the lowest address of a 4-word internal...

  • Page 715

    ; Alters: D0.L,D1.L,D2.L,D3.L,D4.L,D5.L,D6.L,D7.L,D0.H,D1.H dp_sub dp_neg dp_add dp_neg ; MOTOROLA DSP96002 DPLIB - VERSION 1.0 ; DP_TST - Test a double precision operand. ; Entry point: dp_tst: ; Inputs: r0 contains the lowest address of the 4-word internal extended precision number ;...

  • Page 716

    ;point to coefficients ;multiply, result in p ;point to accumulations ;point to product variable ;add them together ;shift to next dp data value ;move to next dp coefficient ;point to result ;convert to a value in d0 DSP96002 USER’S MANUAL B-197...

  • Page 717

    ;point to a row 1 element ;point to a column 1 element ;restore A offset ;restore B offset ;update A offset for row shift ;point to B column 1 ;point to the next A row ;restore A offset ;resultant matrix finished DSP96002 USER’S MANUAL MOTOROLA...

  • Page 718

    MOTOROLA DSP96002 USER’S MANUAL B-199...

  • Page 719

    56000/1 Word Icyc 2N+7 2N+9 1N+12 2N+9 4N+9 4N+10 5N+9 4N+8 2N+8 4N+16 3N+5 3N+4 4N+10 5N+10 +5N+8 +7N+12 DSP96002 USER’S MANUAL DSP96000 Word Icyc 2N+7 2N+9 1N+12 2N+8 4N+9 4N+12 4N+14 4N+8 2N+8 4N+18 3N+5 3N+7 4N+12 5N+11 +6N+7...

  • Page 720

    32 Bit B.1.43 Incremental Line Drawing floating-point Fixed Point (Bresenham’s algorithm) B.1.44 Three Dimensional Wire-Frame Rendition B.1.45 Walsh-Hadamard Transforms B.1.46 Evaluation of LOG2(x) Figure B-1. Standard Benchmark Summary (continued) MOTOROLA DSP96002 USER’S MANUAL DSP96000 Word Icyc 3N+14 3N+12 3N+19 3N+15 5N+6...

  • Page 721

    Single Precision floating-point Single Precision to: Signed 32 Bit Integer Unsigned 32 Bit Integer Figure B-1. Standard Benchmark Summary (continued) B-202 Matrix Multiplication Matrix Multiplication Matrix Multiplication Matrix Multiplication DSP96002 USER’S MANUAL DSP96000 Word Icyc 3N+8 5N+4 8N+26 8N+27 8N+37 +5n+16...

  • Page 722

    Signaling not a number Quiet not a number Negative infinity Negative normalized nonzero Negative denormalized Negative zero Positive zero Positive denormalized Positive normalized nonzero Positive infinity Figure B-1. Standard Benchmark Summary (continued) MOTOROLA DSP96002 USER’S MANUAL DSP96000 Word Icyc B-203...

  • Page 723

    Figure B-1. Standard Benchmark Summary (continued) B-204 TYPICAL WORST CASE FULLY TESTED 6.86 us 29.1 us 7.01 us 29.2 us 13.58 us 39.5 us Instruction Cycles TYPICAL WORST CASE 1020 1317 1413 DSP96002 USER’S MANUAL BEST CASE MOTOROLA...

  • Page 724

    NaNs: 4. Quiet NaNs (QNaNs): are encodings of information regarding meaningless or invalid results. MOTOROLA APPENDIX C IEEE ARITHMETIC • b p -1 = an integer between E and E = 0 or 1 DSP96002 USER’S MANUAL , inclusive.

  • Page 725

    "Invalid Operation" floating point exception. The returned result is a QNaN. Floating point operands in the DSP96002 are either 32 bits long (Single Real), 64 bits long (Double Real) or 96 bits long (Register operand). The operand size is either explicitly encoded in the instruction or implicitly defined by the instruction operation.

  • Page 726

    +...+ (– e min - bias E min = 1 • 2 = 1• 2 min,n DSP96002 USER’S MANUAL E min E max is not explicitly represented. ), the number in question is • b , is equal to ( e=e...

  • Page 727

    =1) Quiet NaNs are represented by a fraction with MSB = 1 (and e=e DSP96002 only fully supports one QNaN, the "legal" QNaN as required by the standard. This QNaN is encoded by a fractional field of all ones ( all b (DSP96002 "illegal"...

  • Page 728

    52 51 11...1 Figure C-3. Encodings for + and - Infinity 31 30 23 22 11...1 1111...1 Single Precision 63 62 52 51 11...1 11111111...1 Figure C-4. Encodings for QNaNs MOTOROLA Double Precision Double Precision Double Precision DSP96002 USER’S MANUAL...

  • Page 729

    DSP96002 data ALU as a result of floating point arithmetic operations, is em- bedded in the DP format, and is thus stored implicitly as a DP number with zeros in the lower 21 bits of the fraction.

  • Page 730

    MOTOROLA 63 62 Fraction (MSBs) Dn.m i : explicit integer E min Tiny SP Numbers between +2 63 62 Fraction Dn.m DSP96002 USER’S MANUAL 32 31 11 10 Fraction (LSBs) Dn.l ,Exclusive -126 +1.0 , etc. 32 31 11 10...

  • Page 731

    4. Special function unit: A special function unit provides various logic functions, as well as support for divide and square root in terms of an initial seed for a fast convergent divide and square root DSP96002 USER’S MANUAL =1 (unbiased exponent of...

  • Page 732

    0.m Operands Results Add/Subtract Unit Multiply Unit Special Function Unit Rounded result (to p=4 bits for example) 1.001 (round up) 1.000 (round down) 1.000 (round down) 1.010 (round up) DSP96002 USER’S MANUAL X-Data Bus Y-Data Bus d0.l Register File...

  • Page 733

    ALU operations in the same instruction cycle: dual source operands are allowed. They can not be used as dual destinations in the same instruction cycle. Figure C-9. The Data ALU’s Register File C-10 d0.h d 0.m DSP96002 USER’S MANUAL d0.l MOTOROLA...

  • Page 734

    (2) – Bits 11-31 are only nonzero when the register contains a DP floating point number. (3) – Bits 0-10 are always zero when Bit 30 representing a floating point number. DSP96002 USER’S MANUAL X or Y Data Memory 11 10 X or Y Data Memory C-11...

  • Page 735

    When moving DP numbers into the Data ALU from memory (see Figure C-10b), the 52 bit fraction of the C-12 21 20 Fraction 63 62 32 31 Fraction 21 22 Fraction DSP96002 USER’S MANUAL L Data Memory 11 10 L Data Memory MOTOROLA...

  • Page 736

    (correct representation with 11-bit bias) (the number is normalized so hidden bit is 1) (cleared; the number can be used in computations without adding extra cycles for normalization, since it is a normalized number) - mantissa = 1.00...00 DSP96002 USER’S MANUAL C-13...

  • Page 737

    (set; the number cannot be used in computations without adding extra cycles for normalization, since it is unnormalized) 0 01111111 0000 ... 00 0 01111111111 0000 ... 00 DSP96002 USER’S MANUAL Data read correctly (read as 1.0) Data read correctly (read as 1.0)

  • Page 738

    (correct representation with 11-bit bias) (the number is not normalized) (cleared; the number can be used in computations as it is by the adder) (set; it indicates a denormalized number in DP, requiring extra cycles for denormalization in multiply operations) DSP96002 USER’S MANUAL C-15...

  • Page 739

    01110000000 0 0100 ... 00 Figure C-12. SP Move Of A SP Denormalized Number C-16 0 00000000 0100 ... 00 0 01110000000 0100 ... 00 DSP96002 USER’S MANUAL Data read correctly (read as 2**(-128)) Data read incorrectly (read as 1.01x2**( 127))

  • Page 740

    MOTOROLA 0 00000000000 0100 ... 00 0 00000000 0100 ... 00 DSP96002 USER’S MANUAL Data read incorrectly (read as 2**(-128)) Data read correctly (read as 2**(-1024))

  • Page 741

    Figure C-13. Denormalized Numbers In Double Precision (DP) -1054<E<-1022 denormalized (in DP/SEP) Figure C-14. Floating-Point Moves Summary C-18 INPUT DATA SNAN QNAN infinity SNAN (see Notes 1,3) QNAN infinity DSP96002 USER’S MANUAL MOVE MOVE TYPE RESULT CORRECT CORRECT CORRECT CORRECT CORRECT CORRECT CORRECT CORRECT...

  • Page 742

    The results are formatted in double precision before being stored in the Data ALU registers. When performing a DP move into a register and then using that register in a DSP96002 SEP floating point operation, the mantissa of the operand will be first truncated to a SEP value, as the hardware is unable to operate on more than 32 mantissa bits.

  • Page 743

    DP format with the V tag set and I bit cleared, and it may be read out by double precision moves without errors C-20 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 744

    All cases where "move out type"=SP and "move out result"=WRONG can be corrected by rounding in the instruction (using the .S option). The case where "move out type"=SP and "move out result"=TRUNC can also be corrected by using the .S option. MOTOROLA DSP96002 USER’S MANUAL C-21...

  • Page 745

    For example, if the biased exponent of the first floating point operand equals 10 and the biased exponent of the second floating point operand equals 13, the mantissa of the first operand will be right shifted by three C-22 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 746

    SP normalized in SEP normalized (all formats) denormalized in SP normalized in SEP normalized in SEP denormalized in SEP zero in SEP (underflow) DSP96002 USER’S MANUAL TAGS MOVE MOVE OUT RESULT TYPE CORRECT CORRECT CORRECT CORRECT CORRECT...

  • Page 747

    1.00...0 with a biased exponent of 10, the result mantissa after sub- traction is -0.010...0. This is not normalized, and the postnormalization unit subtracts two from the exponent. The result mantissa is -1.000...0 with a biased exponent equal to 8. C-24 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 748

    IEEE mode procedure. Next, one additional cycle is added for each denormalized in- MOTOROLA 32 Bits Multiplier Array 64 Bits Round 32 Bits DSP96002 USER’S MANUAL Rounding mode is determined by rounding bits in the MR. C-25...

  • Page 749

    C.2.2 Integer Storage Format in Memory The DSP96002 supports four integer memory data formats: 1. Signed word integer: 32 bits wide, two’s complement representation. This storage format can be used in either X and/or Y data memory space.

  • Page 750

    Exponent Comparator/ Update Unit From Pre-normalization 32 Bits Adder Rounding 32 Bits MOTOROLA Barrel Shifter/ Normalization Unit Adder 32 Bits 32 Bits Rounding To Post-normalization DSP96002 USER’S MANUAL Subtracter Round 32 Bits Subtracter 32 Bits C-27...

  • Page 751

    ALU source registers and delivers a 32-bit result in the low portion of the des- C-28 11 Bits 11 Bits 11 Bits 11 Bits max(E1, E2) E1-E2 To Post- To Mantissa Normalization Alignment DSP96002 USER’S MANUAL MOTOROLA...

  • Page 752

    4. Barrel Shifter: The barrel shifter in the normalization unit used for mantissa alignment in float- ing point additions is also available for performing multibit shifts on integer (fixed-point) data. Both single and multibit arithmetic shifts left and right and logical shifts left and right are sup- ported. MOTOROLA DSP96002 USER’S MANUAL C-29...

  • Page 753

    Quiet NaNs (QNaNs): are encodings of information regarding meaningless or invalid results. Examples of QNaNs are results of operations such as 0/0, MOTOROLA APPENDIX D • b p -1 = an integer between E and E = 0 or 1 DSP96002 USER’S MANUAL , inclusive. , etc. Encodings of QNaNs...

  • Page 754

    "Invalid Operation" floating point exception. The returned result is a QNaN. Floating point operands in the DSP96002 are either 32-bits long (Single Real), 64 bits long (Double Real) or 96 bits long (Register operand). The operand size is either explicitly encoded in the instruction or implicitly defined by the instruction operation.

  • Page 755

    ), the number in question is called normalized, e - bias • 2 + (0.25) • b +...+ (– e min - bias = 1 • 2 min,n DSP96002 USER’S MANUAL • b , f=0): for SP numbers. =1, e=e...

  • Page 756

    =0) Signaling NaNs are never generated by the DSP96002 as arithmetic results, but may appear in the DSP96002 memory as passed along by other processors. SNaNs are characterized by a MSB of the fractional field equal to 0 (and e = e the invalid operation exception is signaled, and the result is returned as a "legal"...

  • Page 757

    52 51 11...1 Figure D-3. Encodings for + and - Infinity 31 30 23 22 11...1 1111...1 Single Precision 63 62 52 51 11...1 11111111...1 Figure D-4. Encodings for QNaNs MOTOROLA Double Precision Double Precision Double Precision DSP96002 USER’S MANUAL...

  • Page 758

    D.1.3 IEEE Floating Point Exceptions The IEEE standard defines five types of exceptions which must be signaled when detected. The DSP96002 implements the default "trap disabled" way of signaling exceptions: when an exception occurs, a flag is set and program execution continues. The flag remains set until cleared by the user. The different exceptions are: 1.

  • Page 759

    7. Fraction – bits 11 through 62. This is a 52-bit field representing the fractional part of the man- tissa (only 31 are used by the DSP96002 floating-point ALU). The remaining bits are set to zero by floating-point ALU operations or single-precision floating-point moves. Since the inter- nal format is DP, the fraction consists of 52 bits.

  • Page 760

    63 62 Fraction (MSBs) Dn.m i : explicit integer E min Tiny SP Numbers between 2 Figure D-6. Tiny Numbers 63 62 Fraction Dn.m DSP96002 USER’S MANUAL 32 31 11 10 Fraction (LSBs) Dn.l -126 +1.0 32 31 11 10 Dn.l...

  • Page 761

    3. Round to plus infinity: results are always rounded in the direction of plus infinity, i.e. "up". MOTOROLA Automatic Format Conversion Unit d0.h d 0.m Operands Add/Subtract Unit Multiply Unit Special Function Unit Figure D-8. The Data ALU DSP96002 USER’S MANUAL X-Data Bus Y-Data Bus d0.l Register File Results...

  • Page 762

    The format conversion unit provides automatic format conversion from/to the SP and DP memory storage Figure D-9. The Data ALU’s Register File D-10 Rounded result (to p=4 bits for example) 1.001 (round up) 1.000 (round down) 1.000 (round down) 1.010 (round up) d0.h d 0.m DSP96002 USER’S MANUAL d0.l MOTOROLA...

  • Page 763

    Fraction (2) – Bits 11-31 are only nonzero when the (3) – Bits 0-10 are always zero when Bit 30 DSP96002 USER’S MANUAL X or Y Data Memory 11 10 X or Y Data Memory register contains a DP floating point number.

  • Page 764

    When moving DP numbers from the data ALU to memory, the above process is reversed, as shown in Fig- D-12 21 20 Fraction 63 62 32 31 Fraction 21 22 Fraction DSP96002 USER’S MANUAL L Data Memory 11 10 L Data Memory MOTOROLA...

  • Page 765

    (correct representation with 11-bit bias) (the number is normalized so hidden bit is 1) (cleared; the number can be used in computations without adding extra cycles for normalization, since it is a normalized number) - mantissa = 1.00...00 DSP96002 USER’S MANUAL - fraction D-13...

  • Page 766

    Data ALU floating-point register D0-D9. Fol- D-14 0 01111111 0000 ... 00 0 01111111 0000 ... 00 0 01111111111 0000 ... 00 DSP96002 USER’S MANUAL Data read correctly (read as 1.0) Data read correctly (read as 1.0)

  • Page 767

    (8 bit bias) (incorrect representation with 11-bit bias; the correct representation would be 37F) (the number is unnormalized) (set; the number cannot be used in computations without adding extra cycles for normalization, since it is unnormalized) DSP96002 USER’S MANUAL D-15...

  • Page 768

    Data ALU floating-point register D0-D9. D-16 yield wrong 0 00000000 0100 ... 00 0 00000000 0100 ... 00 0 01110000000 0100 ... 00 DSP96002 USER’S MANUAL data this case. Data read correctly (read as 2**(-128)) Data read incorrectly (read as 1.01x2**( 127))

  • Page 769

    (correct representation with 11-bit bias) (the number is not normalized) (cleared; the number can be used in computations as it is by the adder) (set; it indicates a denormalized number in DP, requiring extra cycles for denormalization in multiply operations) DSP96002 USER’S MANUAL D-17...

  • Page 770

    D-18 0 00000000000 0100 ... 00 0 00000000 0100 ... 00 DSP96002 USER’S MANUAL Data read incorrectly (read as 2**(-128)) Data read correctly (read as 2**(-1024))

  • Page 771

    Note 1 The xx...xx pattern for the signaling NaNs indicates any NON-ZERO bit pattern. MOTOROLA INPUT DATA SNAN QNAN infinity SNAN (see Notes 1,3) QNAN infinity DSP96002 USER’S MANUAL TAGS MOVE MOVE TYPE RESULT CORRECT CORRECT CORRECT CORRECT CORRECT CORRECT...

  • Page 772

    The results are formatted in double precision before being stored in the Data ALU registers. When performing a DP move into a register and then using that register in a DSP96002 SEP floating point operation, the mantissa of the operand will be first truncated to a SEP value, as the hardware is unable to operate on more than 32 mantissa bits.

  • Page 773

    If the register is read by a single precision move, completely incorrect data will be obtained; see the discussion in Section C.3.3 (double precision and single extended precision numbers have the same exponent bias). MOTOROLA DSP96002 USER’S MANUAL D-21...

  • Page 774

    DP QNAN e=7FF mantissa=1.11...11 infinity in SP and SEP written as DP infinity e=7FF mantissa=1.00...00 infinity in SP normalized in SEP normalized (all formats) DSP96002 USER’S MANUAL TAGS MOVE MOVE OUT RESULT TYPE CORRECT CORRECT CORRECT CORRECT CORRECT CORRECT...

  • Page 775

    32-bit mantissas (1 integer bit and 31 fractional bits) are first "aligned" for floating point addition MOTOROLA DATA ALU OPERATION RESULT denormalized in SP normalized in SEP normalized in SEP denormalized in SEP zero in SEP (underflow) DSP96002 USER’S MANUAL TAGS MOVE MOVE OUT RESULT TYPE WRONG CORRECT WRONG CORRECT...

  • Page 776

    The largest of the two exponents is delivered to the exponent update unit. The exponent update unit may update D-24 DSP96002 USER’S MANUAL MOTOROLA...

  • Page 777

    (integer) operations. The divide and square root unit supports execution of the divide and square root algorithms. These algo- rithms are iterative, and require an initial approximation or "seed". The FSEEDD and FSEEDR instructions MOTOROLA DSP96002 USER’S MANUAL D-25...

  • Page 778

    When denormalized output results are detected, the IEEE mode procedure is entered (one additional instruction cycle) and each result is again normalized (another cycle). D-26 11 Bits Add exponents and subtract bias 11 Bits DSP96002 USER’S MANUAL MOTOROLA...

  • Page 779

    Figure D-14. The Adder/Subtracter From Pre-normalization 32 Bits Adder Rounding 32 Bits Figure D-15. The Adder/Subtracter Unit MOTOROLA Barrel Shifter/ Normalization Unit Adder 32 Bits 32 Bits To Post-normalization DSP96002 USER’S MANUAL Subtracter Round 32 Bits Subtracter Rounding 32 Bits D-27...

  • Page 780

    The operand size for each instruction is either explicitly encoded in the instruction or implicitly defined by the instruction. D.2.2 Integer Storage Format in Memory The DSP96002 supports four integer memory data formats: 1. Signed word integer: 32-bits wide, two’s complement representation. This storage format can be used in either X and/or Y data memory space.

  • Page 781

    4. Barrel Shifter: The barrel shifter in the normalization unit used for mantissa alignment in float- ing point additions is also available for performing multibit shifts on integer (fixed-point) data. Both single and multibit arithmetic shifts left and right and logical shifts left and right are sup- ported. MOTOROLA DSP96002 USER’S MANUAL D-29...

  • Page 782

    Order this document by DSP96002UM/AD Motorola reserves the right to make changes without further notice to any products herein to im- prove reliability, function or design. Motorola does not assume any liability arising out of the appli- cation or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.

  • Page 783

    ALU register file decoupling, en- hancements to the OnCE, and a new timer/event counter. The revised DSP96002 is fully compatible with its predecessor. Special mode bits in var- ious registers allow the user to access the new features.

  • Page 784

    SRAMs. They are active-low when the DSP96002 is the bus master, and three-stated when the DSP96002 is not the bus master. They are asserted during ex- ternal memory write cycles to indicate that the address lines A0-A32, S1, S0, BS, BL, and R/W are stable.

  • Page 785

    WE pin of a static RAM. The DSP96002 diagram shown in Figure 6 on page 29 includes the new write strobe pins.

  • Page 786

    The DSP96002 instruction cache is a “real-time” cache and therefore it has no inherent penalty on a cache miss. In other words, if there is a cache hit, it takes exactly one bus cycle to fetch the instruction from the on-chip cache - like fetching any other data from an on-chip memory.

  • Page 787

    128 valid-bits each, one bank for every sector. Note that the valid-bits are not available to the user for direct use. They are cleared by the processor RESET to indicate that the PRAM context has not been initialized. MOTOROLA 25 bit Tag Field Figure 2 - Cache Controller Block Diagram...

  • Page 788

    The SRU now updates the new situation in the sector replacement control unit. In PRAM mode, when the cache is disabled, fetches are done internally or externally as in the first revision of the DSP96002. INSTRUCTION CACHE PROGRAMMING MODEL 2.4.1...

  • Page 789

    Cache Enable (CE) bit. When the CE bit is cleared (0) the DSP96002 is in PRAM mode. When the CE bit is set, the processor is in cache mode. The CE bit is cleared during reset. NEW INSTRUCTIONS The DSP96002 instruction set features six new instructions discussed in the following paragraphs to support the instruction cache operation.

  • Page 790

    2.5.6 PFLUSH The PFLUSH instruction will flush the whole cache, unlock all cache sectors, set the LRU stack, and tag registers to their default values. The PFLUSH instruction is enabled both in cache mode and PRAM mode. PUNLOCKR Rn MOTOROLA...

  • Page 791

    CACHE OPERATING MODES There are two main operating modes for the DSP96002: cache mode and PRAM mode. They are both global, as they affect the internal program memory as a whole. When the processor is in cache mode, each separate sector could be in one of two operating modes: sector unlocked mode or sector locked mode.

  • Page 792

    This cache sector will be locked but empty. As a result, the locked cache sector is placed at the top of the LRU stack indi- cating that it is the most recently used sector. MOTOROLA...

  • Page 793

    2.6.2 PRAM Mode In the PRAM mode the DSP96002 is fully compatible with the original DSP96002. The in- ternal program RAM is either enabled or disabled, according to the OMR. DMA references to/from program memory, and the MOVEM instruction are fully enabled.

  • Page 794

    first 1K addresses is different from the external program memory for these addresses. Since the DMA transfer into in- ternal program memory is usually used for time critical routines and interrupt vectors, and MOTOROLA...

  • Page 795

    PRAM mode. Note: For implementation reasons, when a MOVEM-in in cache mode causes a word miss, but a sector hit (i.e. the specified word is not in the cache but the sector it belongs MOTOROLA...

  • Page 796

    2.10 DEFAULT MODE ON HARDWARE RESET After reset, the DSP96002 configuration acts just as if there were no instruction cache fea- ture available, and the three MOD pins determine the processor’s operating mode. All val- id-bits are cleared. All cache sectors are in unlocked state. The tag registers values form a contiguous 1K segment of memory and therefore hold the values 0,1,2,...,7 that corre-...

  • Page 797

    (“target”) points before the condition is resolved. Therefore, both the “next” and “target” code words may cause a miss, or even a sector miss, thereby replacing the current LRU sector with a new sector that is not necessarily needed. MOTOROLA...

  • Page 798

    CACHE USE SCENARIO This section demonstrates a possible scenario of cache use in a real time system. 1. The DSP96002 leaves the hardware reset in PRAM mode as determined by the mode bits in the OMR. 2. To achieve “hit on first access” (especially important for the fast interrupt vectors), the user, while still in PRAM mode and using DMA, transfers the interrupt vectors and some critical routines into the lower PRAM addresses.

  • Page 799

    10. To execute the bootstrap program the user switches to PRAM mode, executes the 3 NOPs needed for pipeline delay, performs a PFLUSH, and only then switches to boot- strap mode: MOTOROLA MOVE #140, R0 ; load effective address to r0 ;...

  • Page 800

    PRAM mode. 3 INTEGER MODE The DSP96002’s integer performance has been doubled with the definition of the new in- teger mode. The integer mode improves the performance of integer algorithms and sup- ports four new parallel integer operations that are enabled while the processor is in integer mode: •...

  • Page 801

    files: a 10 floating-point register file (d0.h..d9.h, d0.m..d9.m) and a 10 integer register file (d0.l..d9.l). If the program uses only single-precision MOVE operations and floating-point MOTOROLA SOVF SUNF SDZ SINX Figure 3 - DSP96002 Programming Model ; set the IM bit in MR register ; pipeline delay ; pipeline delay Reserved...

  • Page 802

    floating-point number stored in the high and middle portions of the destination register. Thereby full decoupling is achieved. Single Precision Mode does not affect double-precision MOVE operations, long integer MOVE operations or the single-extended-precision floating-point operations. Single Precision Mode Bit MOTOROLA...

  • Page 803

    (8 tags + locks/lru). The configuration was previously noted as the Program Address Bus Latch for Decode (OPABD) in the table on page 10-17 of the DSP96002 User’s Manual (DSP96002UM/AD). The following table replaces the table currently in the manual.

  • Page 804

    Program Instruction Latch (OPILR) Clear Program Breakpoint Counter Clear Data Breakpoint Counter Clear Trace Counter Reserved Reserved Program Address Bus FIFO and Increment Counter Tags Buffer Program Address Bus Latch for Decode (OPABD) Reserved Reserved Reserved Reserved No Register Selected MOTOROLA...

  • Page 805

    “least recently used”, in which case there is no “next to be replaced sector” because no sector will be replaced until at least one sector is unlocked. lock lock 31 30 29 MOTOROLA lock 0 Figure 4 - Circular Tags Buffer TAG number 0 TAG number 1...

  • Page 806

    19. Send command READ TAGS BUFFER (read tag 6 and increment pointer). 20. ACK 21. CLK 22. Send command READ TAGS BUFFER (read tag 7 and increment pointer). 23. ACK 24. CLK 25. Send command READ TAGS BUFFER (read locks/lru register and increment pointer). 26. ACK 27. CLK MOTOROLA...

  • Page 807

    This routine uses R0 as pointer to cache addresses. Therefore this register has to be read before the routine, and has to be loaded with the value xxx. At the end of the routine, the values of R0 must be restored. See Section 10.12.3 in the DSP96002 User’s Manual (DSP96002UM/AD) for an example.

  • Page 808

    13. Send 32 bits of the opcode of a two word jump instruction ($030c3f80). (After all the 32-bits have been received the PDB register drives the PDB. ODEC causes the core to load the opcode. An acknowledge is issued to the command controller.) 14. ACK MOTOROLA...

  • Page 809

    (All the chips will resume fetching from their target addresses synchronously. Note that the trace counter will count this instruction so the current trace counter may need to be corrected if the trace mode enable bit in the OSCR has been set.) MOTOROLA...

  • Page 810

    This section describes the two identical and independent timer/event counter modules now featured on the DSP96002. The timer can use internal or external clocking and can interrupt the processor after a number of events specified by a user program, or it can sig- nal an external device after counting internal events.

  • Page 811

    INTERRUPT AND MODE CONTROL MODA/IRQA MODB/IRQB MODC/IRQC RESET CLOCK INPUT QUIET POWER V cc Figure 6 - DSP96002 Signal Functional Groups MOTOROLA DSP96002 223 PINS ADDRESS BUS B (32) bA0-bA31 DATA BUS B (32) bD0-bD31 V cc PORT B BUS CONTROL...

  • Page 812: Top View

    BD31 GNDN BD26 BD22 BD17 BD14 BD11 BD07 BD04 BD01 AD02 AD06 AD08 BD29 BD27 BD24 BD21 BD18 BD15 BD12 BD09 BD06 BD03 BD00 AD03 AD04 Figure 7 - DSP96002 Pin Assignment AA02 AA04 AA07 AA10 AA13 AA16 AA00 AA03 AA06 AA09 AA11 AA14 AA18 AA20...

  • Page 813

    The DSP96002 views each timer as a memory-mapped peripheral occupying two 32-bit words in the X data memory space, and may use each timer as a normal memory-mapped peripheral by using standard polled or interrupt programming techniques.The program- ming model is shown in Figure 5.

  • Page 814

    Note: Because of its affect on signal polarity, and on how GPIO data is read and written, GPIO TC0 GPIO READ/WRITE TIMER CONTROL/STATUS REGISTER (TCSR0) ADDRESS X:$FFFFFFE0 READ/WRITE TIMER COUNT REGISTER (TCR0) ADDRESS X:$FFFFFFE1 READ/WRITE TIMER CONTROL/STATUS REGISTER (TCSR1) ADDRESS X:$FFFFFFE8 READ/WRITE TIMER COUNT REGISTER (TCR1) ADDRESS X:$FFFFFFE9 MOTOROLA...

  • Page 815

    IO function is disabled. GPIO is cleared by hardware and software resets. Note: The case where TC2-TC0 are not all zero and GPIO=1 is undefined and should not be used MOTOROLA Table 2 TC Bit Functionality CLOCK GPIO*...

  • Page 816

    When the timer is enabled (TE=1) and the user program writes to the TCR, the value is stored there and will be loaded into the counter after the counter has been decremented to zero and a new event occurs. MOTOROLA...

  • Page 817

    (TE=0). Figure 9 illustrates Mode 0 with the timer enabled. Figure 10 illustrates the events with the timer disabled. write to TCR (N) Clock (CLK/2) Counter Interrupt Figure 9 - Standard Timer Mode (Mode 0) MOTOROLA first event last event...

  • Page 818

    With the timer enabled (TE=1), the counter is loaded with the value contained by the TCR. The counter is decremented by a clock derived from the DSP’s internal clock, divided by stop counting N-k-1 N-k-1 Figure 10 - Timer Disabled write to first event TCR (N) MOTOROLA...

  • Page 819

    (CLK/2) Counter Interrupt Figure 12 - Standard Timer Mode, Internal Clock, Output Pulse Enabled (INV=1) two (CLK/2). During the clock cycle following the point where the counter reaches 0, the MOTOROLA new event last event 2xCLK new event last event...

  • Page 820

    (TE=0).The INV bit determines whether the counting is enabled when TIO is high (INV=0) or when TIO is low (INV=1). Figure 14 illustrates Timer Mode 4 when INV=0 and Figure 15 illustrates Timer Mode 4 with INV=1. MOTOROLA...

  • Page 821

    Clock Counter Interrupt Figure 14 - Pulse Width Measurement Mode (INV=0) start event Clock Counter Interrupt Figure 15 - Pulse Width Measurement Mode (INV=1) MOTOROLA stop event start event start event stop event...

  • Page 822

    TCR, and the entire process is repeated until the timer is disabled (TE=0). The INV bit determines whether 0-to-1 transitions (INV=0) or 1-to-0 transitions (INV=1) will decrement the counter. Figure 18 illustrates Timer Mode 7 when INV=0, and Figure 19 illustrates Timer Mode 7 when INV=1. MOTOROLA...

  • Page 823

    (first event) Clock Counter Interrupt Figure 16 - Period Measurement Mode (INV=0) periodic event (first event) Clock Counter Interrupt Figure 17 - Period Measurement Mode (INV=1) MOTOROLA periodic event periodic event...

  • Page 824

    TCR (N) TIO (Event) Counter Interrupt Figure 18 - Event Counter Mode, External Clock (INV=0) write to TCR (N) TIO (Event) Counter Interrupt Figure 19 - Event Counter Mode, External Clock (INV=1) first event last event first event last event MOTOROLA...

  • Page 825

    General purpose IO input The following routine can be used to read the TIO0 input pin: movep #$02000000,X:TCSR0 here jset #22,x:TCSR0,here MOTOROLA events, generate an ;clear TC2-TC0, set GPIO ;and clear INV for GPIO input ; spin here until TIO0 is set...

  • Page 826

    ; load 64k -1 into the counter ; enable IPL for timer 0 ; remove interrupt masking in status register ; timer enable ; set TIO0 to signal end of task ; clear TIO0 ; return to main program MOTOROLA...

  • Page 827

    #$70000000,x:TCSR1 bset #26,x:IPR andi #$cf,mr bset #31,x:TCSR1 ; do other tasks MOTOROLA ; define buffer in X memory internal $100 ; measure up to 256 pulses ; store width value in table ; second word of the short interrupt ;...

  • Page 828

    ; remove interrupt masking in status register ; timer enable ; read new counter value ; retrieve former read value (initially zero) d0.l,x:temp ; compute delta (i.e. new -old) and store the ; new read value in temp ; store period value in table MOTOROLA...

  • Page 829

    DSP96002 User’s Manual (DSP96002UM/AD) This section also presents the X Memory map, interrupt vector addresses, the list of pri- orities within an IPL, and the interrupt priority register for the DSP96002, all of which have been changed in support of the timer modules.

  • Page 830

    DSN1 addr X:$FFFFFFD5 DMA Destination Modifier Register DDM1 addr X:$FFFFFFD3 DMA Destination Address Register DDR1 addr X:$FFFFFFD2 DMA Destination Offset Register DDN1 addr X:$FFFFFFD1 DMA Counter DCO1 addr X:$FFFFFFD4 DMA Control/Status Register DCS1 DTM1 DTM0 DMAP addr X:$FFFFFFD0 DDS0 MOTOROLA...

  • Page 831

    first edge on any input is latched and triggers a DMA transfer, and any other edge that appears before the latch is cleared will be ignored. Request Mask Bit MOTOROLA Table 3 DMA Request Mask Bits Requesting Device External (IRQA pin)

  • Page 832

    DSR1 -DMA CH1 Source Address Register DSN1 -DMA CH1 Source Offset Register DCO1 -DMA CH1 Counter Register DDM1 -DMA CH1 Destination Modifier Register DDR1 -DMA CH1 Destination Address Register DDN1 -DMA CH1 Destination Offset Register DCS0 -DMA CH1 Control/Status Register RESERVED RESERVED RESERVED MOTOROLA...

  • Page 833

    $00000020 Host A Receive Data $00000022 Host A Transmit Data $00000024 Host A Read X Memory $00000026 Host A Read Y Memory MOTOROLA Interrupt Starting Interrupt Source Address $00000028 Host A Read P Memory $0000002A Host A Write X Memory...

  • Page 834

    first. Within a given interrupt priority level, a second priority structure determines which interrupt is serviced when multiple interrupt requests with the same IPL are pending. Table 6 DSP96002 Exception Priorities within an IPL Priority highest...

  • Page 835

    Timer1 priority level bits. Figure 21 shows the revised IPR with the new bits indicated in bold characters. HBL1 HBL0 HAL1 HAL0 D1L1 D1L0 D0L1 D0L0 IRBS IBL2 IBL1 IBL0 IRAS IAL2 IAL1 IAL0 Figure 21 - Interrupt Priority Register (Address X:$FFFFFFFF) MOTOROLA T1L1 T1L0 T0L1 T0L0 IRCS ICL2 ICL1 ICL0...

  • Page 836

    Timer 1 interrupt. T1L1 T1L0 APPENDIX A – INSTRUCTION SET ADDENDUM DETAILS The following pages present a detailed description of the new instructions added to the DSP96002 instruction set. Enabled Int. Priority Level (IPL) Enabled Int. Priority Level (IPL)

  • Page 837

    - Not affected. - Not affected. - Not affected. ER Status Bits: Not affected IER Flags: Not affected MOTOROLA Integer Signed Multiply and Add Assembler Syntax: MPYS S1,S2,D1 ADD S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYS S2,S1,D1 ADD S3,D2 (move syntax - see the MOVE instruction de- scription.)

  • Page 838

    1 1 0 1 D6*D9 1 1 1 0 D7*D9 1 1 1 1 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words where nn = 0-3 where nn = 0-3 where nnn = 0-7 1sss ddQQ QQDD MOTOROLA...

  • Page 839

    - Not affected. - Not affected. - Not affected. ER Status Bits: Not affected IER Flags: Not affected MOTOROLA Integer Signed Multiply and Subtract Assembler Syntax: MPYS S1,S2,D1 SUB S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYS S2,S1,D1 SUB S3,D2 (move syntax - see the MOVE instruction de- scription.)

  • Page 840

    1 1 0 1 D6*D9 1 1 1 0 D7*D9 1 1 1 1 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words where nn = 0-3 where nn = 0-3 where nnn = 0-7 1sss ddQQ QQDD MOTOROLA...

  • Page 841

    - Not affected. - Not affected. - Not affected. ER Status Bits: Not affected IER Flags: Not affected MOTOROLA Integer Unsigned Multiply and Add Assembler Syntax: MPYU S1,S2,D1 ADD S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYU S2,S1,D1 ADD S3,D2 (move syntax - see the MOVE instruction de- scription.)

  • Page 842

    1 1 0 1 D6*D9 1 1 1 0 D7*D9 1 1 1 1 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words where nn = 0-3 where nn = 0-3 where nnn = 0-7 0sss ddQQ QQDD MOTOROLA...

  • Page 843

    - Not affected. - Not affected. - Not affected. ER Status Bits: Not affected IER Flags: Not affected MOTOROLA Integer Unsigned Multiply and Subtract Assembler Syntax: MPYU S1,S2,D1 SUB S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYU S2,S1,D1 SUB S3,D2 (move syntax - see the MOVE instruction de- scription.)

  • Page 844

    1 1 0 1 D6*D9 1 1 1 0 D7*D9 1 1 1 1 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words where nn = 0-3 where nn = 0-3 where nnn = 0-7 0sss ddQQ QQDD MOTOROLA...

  • Page 845

    CCR Condition Codes: Not affected. ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: PFLUSH 0000 0000 Instruction Fields: None Timing: 2 oscillator clock cycles Memory: 1 program words MOTOROLA Program-Cache Flush Assembler Syntax: PFLUSH 14 13 0000 0000 PFLUSH 0000 0000...

  • Page 846

    CCR Condition Codes: Not affected. ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: PFREE 0000 0000 Instruction Fields: None Timing: 2 oscillator clock cycles Memory: 1 program words Assembler Syntax: PFREE 14 13 0000 0000 PFREE 0000 0000 0010 MOTOROLA...

  • Page 847

    OPTIONAL EFFECTIVE ADDRESS EXTENSION Instruction Fields: ea Rn - R0-R7 (Memory alterable addressing modes only) Absolute Address - 32 bits Timing: 4 + ea oscillator clock cycles Memory: 1 + ea program words MOTOROLA Assembler Syntax: PLOCK 14 13 0000 MMMR...

  • Page 848

    Instruction Format: PLOCKR 0000 0011 Program-Cache-Sector Relative Lock Assembler Syntax: PLOCKR PLOCKR label (short) 14 13 10aa aaaa label 14 13 0000 1000 PC RELATIVE DISPLACEMENT 14 13 0000 001R PLOCKR label 0000 0aaa aaaa 0000 0000 0000 0000 0000 0000 MOTOROLA...

  • Page 849

    Instruction Fields: Rn - R0-R7 Long PC Relative Displacement - 32 bits Short PC Relative Displacement - aaaaaaaaaaaaaaa (15 bits) Timing: 4 + ea oscillator clock cycles Memory: 1 + ea program words MOTOROLA...

  • Page 850

    Rn - R0-R7 (Memory alterable addressing modes only) Absolute Address - 32 bits Timing: 4 + ea oscillator clock cycles Memory: 1 + ea program words Program-Cache-Sector Unlock Assembler Syntax: PUNLOCK 14 13 0100 MMMR PUNLOCK 0000 1000 0000 MOTOROLA...

  • Page 851

    ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: PUNLOCKR 0000 0011 Instruction Format: PUNLOCKR 0000 0011 Instruction Format: PUNLOCKR 0000 0011 MOTOROLA Program-Cache-Sector Relative Unlock Assembler Syntax: PUNLOCKR PUNLOCKR label (short) 14 13 11aa aaaa label 14 13...

  • Page 852

    Instruction Fields: Rn - R0-R7 Long PC Relative Displacement - 32 bits Short PC Relative Displacement - aaaaaaaaaaaaaaa (15 bits) Timing: 4 + ea oscillator clock cycles Memory: 1 + ea program words MOTOROLA...

  • Page 853

    The following ten instructions have been added to the DSP96002 instruction set. These instruc- tions are available only on versions of the DSP96002 that have an instruction cache. The silicon mask numbers for the DSP96002s that do not have these instructions available are: •...

  • Page 854

    Not affected IER Flags: Not affected Integer Signed Multiply and Add Assembler Syntax: MPYS S1,S2,D1 ADD S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYS S2,S1,D1 ADD S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYS//ADD MOTOROLA...

  • Page 855

    1 1 0 1 D6*D9 1 1 1 0 D7*D9 1 1 1 1 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA where nn = 0-3 where nn = 0-3 where nnn = 0-7 1sss ddQQ QQDD...

  • Page 856

    Not affected IER Flags: Not affected Integer Signed Multiply and Subtract Assembler Syntax: MPYS S1,S2,D1 SUB S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYS S2,S1,D1 SUB S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYS//SUB MOTOROLA...

  • Page 857

    1 1 0 1 D6*D9 1 1 1 0 D7*D9 1 1 1 1 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA where nn = 0-3 where nn = 0-3 where nnn = 0-7 1sss ddQQ QQDD...

  • Page 858

    Not affected IER Flags: Not affected Integer Unsigned Multiply and Add Assembler Syntax: MPYU S1,S2,D1 ADD S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYU S2,S1,D1 ADD S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYU//ADD MOTOROLA...

  • Page 859

    1 1 0 1 D6*D9 1 1 1 0 D7*D9 1 1 1 1 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA where nn = 0-3 where nn = 0-3 where nnn = 0-7 0sss ddQQ QQDD...

  • Page 860

    Not affected IER Flags: Not affected Integer Unsigned Multiply and Subtract Assembler Syntax: MPYU S1,S2,D1 SUB S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYU S2,S1,D1 SUB S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYU//SUB MOTOROLA...

  • Page 861

    1 1 0 1 D6*D9 1 1 1 0 D7*D9 1 1 1 1 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA where nn = 0-3 where nn = 0-3 where nnn = 0-7 0sss ddQQ QQDD...

  • Page 862

    ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: PFLUSH 0000 0000 Instruction Fields: None Timing: 2 oscillator clock cycles Memory: 1 program words Program-Cache Flush Assembler Syntax: PFLUSH 14 13 0000 0000 PFLUSH 0000 0000 0011 MOTOROLA...

  • Page 863

    CCR Condition Codes: Not affected. ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: PFREE 0000 0000 Instruction Fields: None Timing: 2 oscillator clock cycles Memory: 1 program words MOTOROLA Assembler Syntax: PFREE 14 13 0000 0000 PFREE 0000 0000 0010...

  • Page 864

    Instruction Fields: ea Rn - R0-R7 (Memory alterable addressing modes only) Absolute Address - 32 bits Timing: 4 + ea oscillator clock cycles Memory: 1 + ea program words Assembler Syntax: PLOCK 14 13 0000 MMMR PLOCK 0000 1000 0000 MOTOROLA...

  • Page 865

    ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: PLOCKR 0000 0011 Instruction Format: PLOCKR 0000 0011 Instruction Format: PLOCKR 0000 0011 MOTOROLA Program-Cache-Sector Relative Lock Assembler Syntax: PLOCKR PLOCKR label (short) 14 13 10aa aaaa label 14 13...

  • Page 866

    Instruction Fields: Rn - R0-R7 Long PC Relative Displacement - 32 bits Short PC Relative Displacement - aaaaaaaaaaaaaaa (15 bits) Timing: 4 + ea oscillator clock cycles Memory: 1 + ea program words MOTOROLA...

  • Page 867

    OPTIONAL EFFECTIVE ADDRESS EXTENSION Instruction Fields: ea Rn - R0-R7 (Memory alterable addressing modes only) Absolute Address - 32 bits Timing: 4 + ea oscillator clock cycles Memory: 1 + ea program words MOTOROLA Program-Cache-Sector Unlock Assembler Syntax: PUNLOCK 14 13...

  • Page 868

    Instruction Format: PUNLOCKR 0000 0011 Program-Cache-Sector Relative Unlock Assembler Syntax: PUNLOCKR PUNLOCKR label (short) 14 13 11aa aaaa label 14 13 0100 1000 PC RELATIVE DISPLACEMENT 14 13 0100 001R PUNLOCKR label 0000 0aaa aaaa 0000 0000 0000 0000 0000 0000 MOTOROLA...

  • Page 869

    Instruction Fields: Rn - R0-R7 Long PC Relative Displacement - 32 bits Short PC Relative Displacement - aaaaaaaaaaaaaaa (15 bits) Timing: 4 + ea oscillator clock cycles Memory: 1 + ea program words MOTOROLA...

  • Page 870

    Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages.

  • Page 871

    MOTOROLA SEMICONDUCTOR TECHNICAL DATA Addendum MOTOROLA INC., 1994...

  • Page 872

    The following ten instructions have been added to the DSP96002 instruction set. These instruc- tions are available only on versions of the DSP96002 that have an instruction cache. The silicon mask numbers for the DSP96002s that do not have these instructions available are: •...

  • Page 873

    Not affected IER Flags: Not affected Integer Signed Multiply and Add Assembler Syntax: MPYS S1,S2,D1 ADD S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYS S2,S1,D1 ADD S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYS//ADD MOTOROLA...

  • Page 874

    1 1 0 1 D6*D9 1 1 1 0 D7*D9 1 1 1 1 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA where nn = 0-3 where nn = 0-3 where nnn = 0-7 1sss ddQQ QQDD...

  • Page 875

    Not affected IER Flags: Not affected Integer Signed Multiply and Subtract Assembler Syntax: MPYS S1,S2,D1 SUB S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYS S2,S1,D1 SUB S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYS//SUB MOTOROLA...

  • Page 876

    1 1 0 1 D6*D9 1 1 1 0 D7*D9 1 1 1 1 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA where nn = 0-3 where nn = 0-3 where nnn = 0-7 1sss ddQQ QQDD...

  • Page 877

    Not affected IER Flags: Not affected Integer Unsigned Multiply and Add Assembler Syntax: MPYU S1,S2,D1 ADD S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYU S2,S1,D1 ADD S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYU//ADD MOTOROLA...

  • Page 878

    1 1 0 1 D6*D9 1 1 1 0 D7*D9 1 1 1 1 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA where nn = 0-3 where nn = 0-3 where nnn = 0-7 0sss ddQQ QQDD...

  • Page 879

    Not affected IER Flags: Not affected Integer Unsigned Multiply and Subtract Assembler Syntax: MPYU S1,S2,D1 SUB S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYU S2,S1,D1 SUB S3,D2 (move syntax - see the MOVE instruction de- scription.) MPYU//SUB MOTOROLA...

  • Page 880

    1 1 0 1 D6*D9 1 1 1 0 D7*D9 1 1 1 1 Timing: 2 + mv oscillator clock cycles Memory: 1 + mv program words MOTOROLA where nn = 0-3 where nn = 0-3 where nnn = 0-7 0sss ddQQ QQDD...

  • Page 881

    ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: PFLUSH 0000 0000 Instruction Fields: None Timing: 2 oscillator clock cycles Memory: 1 program words Program-Cache Flush Assembler Syntax: PFLUSH 14 13 0000 0000 PFLUSH 0000 0000 0011 MOTOROLA...

  • Page 882

    CCR Condition Codes: Not affected. ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: PFREE 0000 0000 Instruction Fields: None Timing: 2 oscillator clock cycles Memory: 1 program words MOTOROLA Assembler Syntax: PFREE 14 13 0000 0000 PFREE 0000 0000 0010...

  • Page 883

    Instruction Fields: ea Rn - R0-R7 (Memory alterable addressing modes only) Absolute Address - 32 bits Timing: 4 + ea oscillator clock cycles Memory: 1 + ea program words Assembler Syntax: PLOCK 14 13 0000 MMMR PLOCK 0000 1000 0000 MOTOROLA...

  • Page 884

    ER Status Bits: Not affected. IER Flags: Not affected. Instruction Format: PLOCKR 0000 0011 Instruction Format: PLOCKR 0000 0011 Instruction Format: PLOCKR 0000 0011 MOTOROLA Program-Cache-Sector Relative Lock Assembler Syntax: PLOCKR PLOCKR label (short) 14 13 10aa aaaa label 14 13...

  • Page 885

    Instruction Fields: Rn - R0-R7 Long PC Relative Displacement - 32 bits Short PC Relative Displacement - aaaaaaaaaaaaaaa (15 bits) Timing: 4 + ea oscillator clock cycles Memory: 1 + ea program words MOTOROLA...

  • Page 886

    OPTIONAL EFFECTIVE ADDRESS EXTENSION Instruction Fields: ea Rn - R0-R7 (Memory alterable addressing modes only) Absolute Address - 32 bits Timing: 4 + ea oscillator clock cycles Memory: 1 + ea program words MOTOROLA Program-Cache-Sector Unlock Assembler Syntax: PUNLOCK 14 13...

  • Page 887

    Instruction Format: PUNLOCKR 0000 0011 Program-Cache-Sector Relative Unlock Assembler Syntax: PUNLOCKR PUNLOCKR label (short) 14 13 11aa aaaa label 14 13 0100 1000 PC RELATIVE DISPLACEMENT 14 13 0100 001R PUNLOCKR label 0000 0aaa aaaa 0000 0000 0000 0000 0000 0000 MOTOROLA...

  • Page 888

    INDEX MOTOROLA INDEX - 1...

  • Page 890

    Bootstrap Program Listing ..15 Bootstrap ROM ....3-6 MOTOROLA INDEX Bus Control Register ..4-3 Bus Control Register (BCR) .

  • Page 891

    DSP Reset ..... 8-8 DSP to Host ....5-20 —D— 6-43 6-51 MOTOROLA...

  • Page 892

    Host to DSP ....5-19 Host Transmit Data Register ..5-5 MOTOROLA Index (Continued) Host Transmit Data Register (HTX) . . . 54 HSR DMA Status (DMA) Bit 7 .

  • Page 893

    PLL Control Register (PLCR) ..45 Port B ......4-6 MOTOROLA...

  • Page 894

    SSI Serial Transmit Register ..58 SSI Status Register (SSISR) ..62 SSI Transmit Slot Mask ... .60 MOTOROLA Index (Continued) SSI0 Clock and Frame Sync Generation .

  • Page 895

    XDB ......1-7 —Y— YD3-YD0 ..... . . 9-4 INDEX - 8 Index (Continued) MOTOROLA...

  • Page 896

    Instruction Fields: Rn - R0-R7 Long PC Relative Displacement - 32 bits Short PC Relative Displacement - aaaaaaaaaaaaaaa (15 bits) Timing: 4 + ea oscillator clock cycles Memory: 1 + ea program words MOTOROLA...

  • Page 897

    Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages.

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  • ALLYSON GIRARDI Sep 14, 2016 03:18:
    Interestin​g commentary - I Appreciate the points , Does someone know where I might be able to locate a blank ZA Applicatio​n for Employment document to fill in ?