Interrupt Priority Registers - Motorola DSP56367 User Manual

As in Mode C, but HDI08 is set for interfacing to Motorola 68302 bus.
Mode F
6.4

INTERRUPT PRIORITY REGISTERS

There are two interrupt priority registers in the DSP56367:
1. IPR-C is dedicated for DSP56300 Core interrupt sources.
2. IPR-P is dedicated for DSP56367 peripheral interrupt sources.
The interrupt priority registers are shown in Figure 6-1 and Figure 6-2. The Interrupt Priority
Level bits are defined in Table 6-4. The interrupt vectors are shown in Table 6-6 and the
interrupt priorities are shown in Table 6-5.
MOTOROLA
Table 6-3 DSP56367 Mode Descriptions
Table 6-4 Interrupt Priority Level Bits
IPL bits
Interrupts
xxL1 xxL0
0 0
0 1
1 0
1 1
DSP56367
Interrupt Priority Registers
Interrupt
Priority
Enabled
Level
No —
Yes 0
Yes 1
Yes 2
Core Configuration
6-7