Motorola DSP56367 User Manual page 206

Host Interface (HDI08)
HDI08 – External Host Programmer's Model
• Two vector registers (IVR and CVR)
These registers can be accessed only by the host processor.
Host processors may use standard host processor instructions (e.g., byte move) and addressing
modes to communicate with the HDI08 registers. The HDI08 registers are aligned so that 8-bit
host processors can use 8/16/24-bit load and store instructions for data transfers. The
HOREQ/HTRQ and HACK/HRRQ handshake flags are provided for polled or
interrupt-driven data transfers with the host processor. Because the DSP interrupt response,
most host microprocessors can load or store data at their maximum programmed I/O
instruction rate without testing the handshake flags for each transfer. If full handshake is not
needed, the host processor can treat the DSP as a fast device, and data can be transferred
between the host processor and the DSP at the fastest host processor data rate.
One of the most innovative features of the host interface is the host command feature. With
this feature, the host processor can issue vectored interrupt requests to the DSP core. The host
may select any of 128 DSP interrupt routines to be executed by writing a vector address
register in the HDI08. This flexibility allows the host programmer to execute up to 128
pre-programmed functions inside the DSP. For example, host interrupts can allow the host
processor to read or write DSP registers (X, Y, or program memory locations), force interrupt
handlers (e.g. IRQA, IRQB, etc. interrupt routines), and perform control and debugging
operations if interrupt routines are implemented in the DSP to perform these tasks.
Host
Address
0
1
2
3
4
5
6
7
Note: The RXH/TXH register is always mapped to the most significant byte of the DSP word.
8-20
Table 8-8 HDI08 Host Side Register Map
Big Endian
HLEND=0
ICR
CVR
ISR
IVR
00000000
RXH/TXH
RXM/TXM
RXL/TXL
Host Data Bus
H0 - H7
DSP56367
Little Endian
HLEND=1
ICR
CVR
ISR
IVR
00000000
RXL/TXL
RXM/TXM
RXH/TXH
Host Data Bus
H0 - H7
Function
Interface Control
Command Vector
Interface Status
Interrupt Vector
Unused
Receive/Transmit
Bytes
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