Shi Host Transmit Data Register (Htx)—Dsp Side - Motorola DSP56367 User Manual

Serial Host Interface
Serial Host Interface Programming Model
Note: The IOSR cannot be accessed directly either by the host processor or by the DSP.
It is fully controlled by the SHI controller logic.
23
Mode of Operation
Stops Data When Data Mode is Selected
Passes Data When Data Mode is Selected
9.5.2 SHI HOST TRANSMIT DATA REGISTER (HTX)—DSP SIDE
The host transmit data register (HTX) is used for DSP-to-Host data transfers. The HTX
register is 24 bits wide. Writing to the HTX register by DSP core instructions or by DMA
transfers clears the HTDE flag. The DSP may program the HTIE bit to cause a host transmit
data interrupt when HTDE is set (See 9.5.6.10 HCSR Transmit-Interrupt Enable
(HTIE)—Bit 11 on page Section 9-16.) Data should not be written to the HTX until HTDE is
set in order to prevent overwriting the previous data. HTX is reset to the empty state when in
stop mode and during hardware reset, software reset, and individual reset.
In the 8-bit data transfer mode the most significant byte of the HTX is transmitted; in the
16-bit mode the two most significant bytes, and in the 24-bit mode all the contents of HTX is
transferred.
9.5.3 SHI HOST RECEIVE DATA FIFO (HRX)—DSP SIDE
The 24-bit host receive data FIFO (HRX) is a 10-word deep, First-In-First-Out (FIFO) register
used for Host-to-DSP data transfers. The serial data is received via the shift register and then
loaded into the HRX. In the 8-bit data transfer mode, the most significant byte of the shift
register is transferred to the HRX (the other bits are cleared); in the 16-bit mode the two most
significant bytes are transferred (the least significant byte is cleared), and in the 24-bit mode,
all 24 bits are transferred to the HRX. The HRX may be read by the DSP while the FIFO is
9-8
15
16
8-Bit Data
Mode
Figure 9-5 SHI I/O Shift Register (IOSR)
DSP56367
7
8
16-Bit Data
Mode
0
24-Bit Data
Mode
AA0420
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