Serial Host Interface Spi Protocol Timing - Motorola DSP56367 User Manual

24-bit digital signal processor
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3.12

SERIAL HOST INTERFACE SPI PROTOCOL TIMING

Table 3-19 Serial Host Interface SPI Protocol Timing
No.
Characteristics
140
Tolerable spike width on clock or data in
141
Minimum serial clock cycle = t
142
Serial clock high period
143
Serial clock low period
144
Serial clock rise/fall time
MOTOROLA
Serial Host Interface SPI Protocol Timing
Filter
1
Mode
Mode
Bypassed
Narrow
Wide
Maste
Bypassed
(min)
SPICC
r
Narrow
Wide
Maste
Bypassed
r
Narrow
Wide
Slave
Bypassed
Narrow
Wide
Maste
Bypassed
r
Narrow
Wide
Slave
Bypassed
Narrow
Wide
Maste
r
Slave
DSP56367
Expression
6×T
+46
C
6×T
+152
C
6×T
+223
C
0.5×t
–10
SPICC
0.5×t
–10
SPICC
0.5×t
–10
SPICC
2.5×T
+12
C
2.5×T
+102
C
2.5×T
+189
C
0.5×t
–10
SPICC
0.5×t
–10
SPICC
0.5×t
–10
SPICC
2.5×T
+12
C
2.5×T
+102
C
2.5×T
+189
C
Specifications
Min
Max
Unit
0
ns
50
ns
100
ns
96
ns
202
ns
273
ns
38
ns
91
ns
126.5
ns
32.8
ns
122.8
ns
209.8
ns
38
ns
91
ns
126.5
ns
32.8
ns
122.8
ns
209.8
ns
10
ns
2000
ns
3-55

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